Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that its DesignWare® SuperSpeed USB 3.0 xHCI (Extensible Host Controller Interface) IP has successfully passed the USB Implementers Forum (USB-IF) SuperSpeed USB certification.

Synopsys announced it will report results for the second quarter fiscal year 2011 on Wednesday, May 18, 2011, after the market close. A conference call to review the results will begin at 2 p.m. PT (5 p.m. ET) and will be hosted by Aart de Geus, chairman and chief executive officer, and Brian Beattie, chief financial officer.

Synopsys announced that HiSilicon, a leading fabless semiconductor house supplying end-to-end ASIC solutions for communications networking and digital media markets, has reduced stand-by power consumption by up to 40 percent using the latest technology in Synopsys' IC Compiler, a key component of Synopsys' Galaxy Implementation Platform. Driven by their success, HiSilicon has deployed IC Compiler in their production design flow for ICs targeting ...

Synopsys announced that Exar Corporation, a provider of software and subsystem solutions for industrial, datacom and storage applications, has broadly deployed Synopsys' Design Compiler® Graphical RTL Synthesis solution, a key component of the Galaxy™ Implementation Platform, to shorten its IC design schedule.

Synopsys today announced the immediate availability of the CustomExplorer Ultra mixed-signal verification environment as part of Synopsys' Discovery™ Verification Platform.

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Fairchild Semiconductor (Fairchild) has achieved first-pass silicon success for its FUSB2500 UTMI+ Low-Pin Interface (ULPI) USB On-The-Go (OTG) transceiver chip utilizing Synopsys' DesignWare® USB 2.0 nanoPHY IP.

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has worked with TSMC to develop a broad portfolio of DesignWare® interface PHY IP including SuperSpeed USB 3.0, USB 2.0, HDMI, PCI Express®, DDR and SATA as well as embedded memories for TSMC's 28-nanometer (nm) process technology.

Synopsys today introduced DC Explorer, the latest addition to the Galaxy Implementation platform, to significantly speed up development of high-quality design data. To meet aggressive schedules for today's massively integrated, multimillion-instance, Gigascale designs, engineers need an RTL exploration solution that enables them to quickly and efficiently perform what/if analyses of various design configurations – even before the design data is...

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Freescale Semiconductor, a global leader in the design and manufacture of semiconductors for the automotive, consumer, industrial and networking markets, has licensed Synopsys' DesignWare® IP for Freescale's system-on-chip (SoC) designs.

Synopsys announced that Wilocity has successfully taped-out its multi-gigabit Wireless Gigabit Alliance-compliant system-on-chip (SoC) utilizing Synopsys' broad portfolio of high-quality DesignWare® IP and assistance from Synopsys Professional Services. The DesignWare IP used in the SoC included PCI Express, embedded memories and logic libraries. Wilocity's SoC is based on the Wireless Gigabit Alliance (WiGig) and IEEE802.11ad draft specificatio...

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the release of its next-generation DesignWare Data Converter IP solutions, which deliver more than 50 percent improvement in power with smaller area compared to the previous generation of data converters.

Synopsys, Inc. announced that the Industrial Technology Research Institute of Taiwan (ITRI) has adopted Synopsys' TCAD Sentaurus simulation software to support its research and development of silicon carbide (SiC) semiconductor devices.

Synopsys, Inc. today announced that Amlogic has selected Synopsys' CustomSim solution for mixed-signal verification of its high-performance multimedia system-on-chips (SoCs).

Synopsys, Inc. today announced the availability of enhancements to its CODE V optical design and analysis software.

Synopsys, Inc. today announced Synplify Pro, Synplify Premier and Synphony synthesis support for Xilinx's latest ISE Design Suite (IDS) 13, which provides support for their 28-nanometer (nm) 7 series FPGAs. Synopsys' advanced FPGA synthesis tools include a hierarchical project manager that enables team-design collaboration with a mixed bottom-up/top-down approach that is highly integrated with Xilinx's SmartGuide incremental place & route (P&R) t...

Synopsys, Inc. today announced that Yokogawa Electric Corporation used Synopsys Processor Designer to achieve ultrafast ladder program processing performance for their latest FA-M3V programmable logic controller (PLC). Yokogawa also saved significant development and verification effort with Processor Designer since the tool automatically generates software development tools such as C-compiler, assembler/linker, debugger and the instruction set s...

Synopsys, Inc. and Xilinx, Inc. today announced the availability of the FPGA-Based Prototyping Methodology Manual (FPMM), a practical guide to using FPGAs as a platform for system-on-chip (SoC) development. The FPMM captures valuable design and verification expertise contributed by engineering teams from BBC Research & Development; Design of System on Silicon, S.A. (DS2); Freescale Semiconductor; LSI, Inc.; NVIDIA Corp.; STMicroelectronics; and T...

Synopsys Inc introduced Proteus LRC for lithography verification. Proteus LRC provides comprehensive, process-window-aware checking features to identify locations in a design that are sensitive to process variations, thereby enabling corrective action to be taken prior to committing a design to manufacture. Proteus LRC is integrated into the Proteus Mask Synthesis flow and is targeted for use by OPC and mask data preparation groups at semiconduct...

Synopsys Inc announced the availability of the HAPS-600 series, the highest capacity extension of the HAPS family of FPGA-based prototyping systems. The HAPS-600 series extends FPGA-based prototyping capacity up to 81 million ASIC gates equivalent, enabling early software development for larger SoC projects. Like the HAPS-60 products, the HAPS-600 series is based on Xilinx Virtex-6 LX760 FPGA devices and offers performance up to 200 megahertz.

Synopsys Inc today announced that it is the first IP provider to support the final version of the PCI Express 3.0 base specification, recently released by the PCI Special Interest Group.