Synopsys announces its continued, close collaboration with TSMC to deliver advanced EDA and IP solutions on TSMC's most advanced process and 3DFabric technologies to accelerate innovation for AI and multi-die designs.

Synopsys, has announced the launch of ImSym – Imaging System Simulator, a virtual prototyping platform for imaging systems, encompassing lenses, sensors, and image signal processors (ISPs).

Synopsys announces the availability of its production-ready multi-die reference flow, powered by Synopsys.ai EDA suite, and Synopsys IP for Intel Foundry's embedded multi-die interconnect bridge (EMIB) advanced packaging technology.

Synopsys has announced that its AI-driven digital design and analog design flows have achieved certification on Samsung Foundry's SF2 process with multiple test chip tapeouts.

Synopsys has announced that its AI-driven digital design and analog design flows have achieved certification on Samsung Foundry's SF2 process with multiple test chip tapeouts.

Synopsys, Inc. announced the industry's first complete PCIe 7.0 IP solution, consisting of a controller, IDE security module, PHY, and verification IP.

Synopsys announces it has entered into a definitive agreement with Clearlake Capital Group, L.P. ("Clearlake") and Francisco Partners, two global private equity firms, for the sale of its Software Integrity Group business in a transaction with a total value of up to $2.1 billion, including up to $475 million in cash payable upon Francisco Partners and Clearlake achieving a specified rate of return in connection with one or more liquidity transact...

Synopsys has announced that Samsung Electronics has achieved successful production tapeout for its high-performance mobile SoC design, including flagship CPUs and GPUs, with 300MHz higher performance using Synopsys.ai full stack AI-driven EDA suite and a broad portfolio of Synopsys IP on Samsung Foundry's latest Gate-All-Around (GAA) process technologies.

Synopsys has announced that it has completed the acquisition of Intrinsic ID, a provider of Physical Unclonable Function (PUF) IP used in the design of system-on-chips (SoCs).

In an era dominated by data-intensive AI workloads, Synopsys’ latest offering addresses the critical need for high-bandwidth, low-latency chips capable of processing vast amounts of data swiftly. 

Synopsys is buying Ansys for $35 billion. The deal combines Synopsys' semiconductor electronic design automation (EDA) with Ansys' broad simulation and analysis portfolio creating a company offering silicon to systems design solutions.

Synopsys, Inc. has released BSIMM14, the most recent edition of its annual Building Security In Maturity Model (BSIMM) report.

Synopsys announced a breakthrough generative artificial intelligence (GenAI) capability for accelerating chip design, Synopsys.ai Copilot. 

Synopsys has been selected as a TSMC Open Innovation Platform (OIP) Partner of the Year, earning five awards spanning digital, analog, multi-die system, radio frequency (RF) design, and interface IP.

Synopsys has expanded its collaboration with Arm to provide optimised IP and EDA solutions for the newest Arm technology, including the Arm Neoverse V2 platform and Arm Neoverse Compute Subsystem (CSS).

Synopsys has announced the publication of its "Global State of DevSecOps 2023" report examining the strategies, tools, and practices impacting software security.

Synopsys has announced it is extending its collaboration with TSMC to advance multi-die system designs with a comprehensive solution supporting the latest 3Dblox 2.0 standard and TSMC’s 3DFabric technologies.

Synopsys has announced that its digital and custom/analogue design flows are certified for TSMC's N2 process technology, enabling faster delivery of advanced-node SoCs with higher quality. Both flows are seeing strong momentum, with the digital design flow achieving multiple tape-outs and the analogue design flow adopted for several design starts. 

Synopsys has announced that its collaboration with Intel has achieved end-to-end 64 GT/s interoperability between Synopsys’ IP for PCI Express (PCIe) 6.0 and Intel’s PCIe 6.0-enabled test chip.

Synopsys has announced the extension of its Synopsys.ai full-stack EDA suite with a comprehensive AI-driven data analytics continuum for every stage of integrated circuit (IC) chip development.