Synopsys announced the availability of enhancements to its LightTools illumination design and analysis software, acquired as part of Synopsys' acquisition of Optical Research Associates (ORA). LightTools 7.2 delivers features that will help users graphically analyze simulation results, compute important metrics when designing for the lighting industry, iteratively design with CAD software and improve the efficiency of luminaire and solar designs....

Synopsys has announced that Ricoh Company Ltd., a global leader in imaging devices and industry products, has adopted Processor Designer for custom digital signal processor design. Ricoh's Core Technology Research and Development team designed their latest DSP in only five months, without needing DSP design expertise. Processor Designer automated the custom processor design process by generating both a software development tool flow and optimized...

Virtualizer Accelerates Software Development Schedules by Up to Nine Months with Lower Engineering Effort

Synopsys announced the appointment of Chrysostomos L. Max Nikias to its Board of Directors, effective July 11, 2011. Dr. Nikias is the current President of the University of Southern California (USC), a position he has held since August 2010, and holds the Robert C. Packard President's Chair and the Malcolm R. Currie Chair in Technology and the Humanities.

Synopsys today announced IC Compiler-Advanced Geometry, a new configuration of its market-leading IC Compiler physical design product. IC Compiler-Advanced Geometry targets design support for double-patterning technology (DPT), which has emerged as a key requirement for the next generation of silicon technology at 20 nanometers (nm) and imposes strict constraints on placement, routing and physical verification.

Synopsys announced that its design enablement collaboration with Samsung Electronics, Co., Ltd., a global leader in advanced semiconductor solutions, has achieved a critical milestone with the successful tapeout of the first 20-nanometer (nm) test chip based on Samsung's High-k metal gate (HKMG) process technology. The test chip was implemented using Synopsys' Galaxy™ Implementation Platform, including the Design Compiler® synthesis, IC Compil...

Synopsys, Inc. a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that it has collaborated with GLOBALFOUNDRIES to jointly develop, validate, support and distribute interoperable process design kits (iPDKs) for GLOBALFOUNDRIES' mainstream and advanced process technologies. The GLOBALFOUNDRIES 65-nanometer (nm) iPDKs are available now with additional iPDKs planned for delivery later in 2011....

DesignWare AEON Embedded Non-Volatile Memory IP Improves Electrical Performance and Lowers Integration Risk for Wireless and Analog SoC Designs - Synopsys, Inc. , a world leader in software and IP for semiconductor design, verification and manufacturing, today announced the immediate availability of DesignWare® AEON® Non-Volatile Memory (NVM) IP for multiple 180-nanometer (nm) process technologies. The DesignWare AEON NVM IP products include fe...

Synopsys announced that Brian Beattie, chief financial officer, will speak at the NASDAQ OMX 26th Investor Program in London on June 21, 2011.

Unified Solution Streamlines Development of Embedded Temperature Sensor IP for 65nm, 40nm and 28nm Geometries. Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Moortec Semiconductor Ltd., a mixed-signal IP and semiconductor integrated circuit (IC) provider, has taped out its high-performance analog IP on TSMC's 40LP and 28HP processes using Synopsys' cu...

Dassault Systèmes announced today the launch of a new integration with Synopsys, a world leader in electronic design automation (EDA). The ENOVIA DesignSync for Synopsys’ Galaxy Custom Designer mixed-signal implementation solution integrates the powerful design data management (DDM) capabilities of both ENOVIA DesignSync Data Manager and ENOVIA DesignSync Central within the Synopsys Custom Designer environment. Combined with the existing Des...

Synopsys announced today that Shrenik Mehta has been awarded Synopsys' eleventh annual Tenzing Norgay Interoperability Achievement Award. As chairperson of Accellera, a leading standards organization in electronic design automation (EDA), from 2005 until 2010, Shrenik guided the organization to several collaborative initiatives that created widely-used standards such as SystemVerilog, Unified Power Format (UPF), and Universal Verification Methodo...

ARM and Synopsys have signed an expanded multi-year agreement extending ARM's access to Synopsys' innovative EDA technology. ARM will also provide Synopsys with access to the ARM Cortex-A15 processor to maximize performance and energy efficiency of SoCs built by ARM's Partners using this advanced ARM processor and Synopsys tools. Both agreements build upon a long history of partnership between the two companies, including ARM's use of Synopsys E...

Synopsys announced its close cooperation with STMicroelectronics (ST) in the successful tapeout of ST's first 20-nanometer (nm) technology demonstrator test chip. This tapeout represents a critical milestone in the R&D collaboration between the two companies to develop a comprehensive design enablement solution for system-on-chip (SoC) integrated circuits (ICs) using ST's next-generation 20-nm process technology, co-developed with its ISDA (Inter...

Synopsys announced that it has collaborated with TSMC to deliver Synopsys' custom design solution for TSMC's 28-nanometer (nm) Analog/Mixed-Signal (AMS) Reference Flow 2.0. Part of TSMC's comprehensive 28nm design infrastructure, the flow delivers new advanced automation capabilities to improve productivity and shorten the design cycle. The new capabilities include both parasitic-aware and Layout Dependent Effect (LDE)-aware design methodologies....

Synopsys today that its board of directors has replenished its stock repurchase authorization. Under the replenished program, the company may repurchase Synopsys common stock with a market value up to $500 million.

Synopsys announced that it is delivering comprehensive design enablement for TSMC's 28-nm process technology, integrated manufacturing compliance and an advanced system-level prototyping solution, with TSMC Reference Flow 12.0. New features of the flow include virtual prototyping and high-level synthesis linked to TSMC's advanced processes, expanded manufacturing compliance capabilities and full support of TSMC's latest 28-nm design rules and mo...

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today reported results for its second quarter of fiscal year 2011.

Synopsys announced that its DesignWare SATA IP solutions, including Host and Device Digital Controllers and mixed-signal PHY IP, have successfully passed the Serial ATA International Organization (SATA-IO) 6G certification.

Synopsys announced the availability of an optimized version of the Dynamic Resolution Adaptation (DRA) decoder software for the widely used DesignWare ARC Sound AS211SFX and AS221BD audio processors.