Synopsys has announced the expansion of its collaboration with imec into the fields of nanowire and other devices such as FinFETs and Tunnel-FETs, targeting the 5nm technology node and beyond. The agreement enables Synopsys to deliver accurate, process-calibrated models for its Sentaurus Technology Computer Aided Design (TCAD) tools to semiconductor manufacturers for use during 5nm technology node research and development.

Synopsys has revealed that more than 100 debug and analysis apps have been developed through the VC Apps open interfaces. Offering access to additional debug and analysis capabilities for all Verdi users, the apps are available through the Verdi VC Apps ToolBox and the VC Apps Exchange website.

Synopsys' Coverity Scan Project Spotlight report, which analysed the defects in big data projects detected by the Coverity Scan open source software scanning service, found that the average defect density rate for the projects decreased since the release of the 2013 Coverity Scan Report. In a sample of 16 big data projects that included Apache Hadoop, HBase and Cassandra, the data showed Synopsys' Coverity business group attributed the defect den...

Synopsys has announced VIP (Verification IP) for LPDDR4, based on a 100% native SystemVerilog Universal Verification Methodology (UVM) architecture to enable ease of use, ease of integration and performance. Complete with verification plans, built-in coverage and a protocol-aware memory debug environment, Verdi Protocol Analyzer, Synopsys VIP for LPDDR4 is a complete VIP solution that accelerates verification closure for designers of low power me...

A place and route solution, suitable for both existing and new node technology, has been released by Synopsys. The IC Compiler II, which succeeds the company’s IC Compiler, provides multi-objective concurrent clock and data for pre and post route optimisation, advanced low power optimisation techniques, electro-migration analysis, transparent interface optimisation and support for 10nm process technology.

Providing advanced modelling and analysis features for illumination design, an updated version of illumination design software has been released by Synopsys. LightTools 8.2 provides optical design engineers with ways in which to model complex lighting systems with even greater control, speed and flexibility. 

Synopsys has announced that Faraday has selected Synopsys' Virtualiser tool for the development of Virtualiser Development Kits (VDKs), targeting a range of multimedia, networking and display SoC designs. VDKs are software development kits that use a virtual prototype as a target to accelerate embedded software development, integration and test.

Synopsys has announced that it has shipped over 5,000 of its HAPS FPGA-based prototyping systems to more than 400 companies. The prototyping system features scalable architecture, integrated prototyping software and a rich catalogue of I/O interfaces for ASIC prototypes, accelerating software development, hardware/software integration and system validation. The systems have been deployed across a range of consumer, wired and wireless communicatio...

Synopsys has announced DesignWare IP Prototyping Kits for 10 interface protocols, including USB 3.0, SSIC, PCI Express 2.0, PCI Express 3.0, DDR3, LPDDR3, LPDDR2, MIPI CSI-2, HDMI 2.0 and JEDEC UFS. The kits provide the essential hardware and software elements needed to reduce IP prototyping and integration effort by up to six weeks.

Synopsys announces that Oticon has deployed Synopsys' Design Compiler Graphical RTL synthesis solution for implementation of its hearing solution IC range. Minimising IC area and power consumption while maximising functionality and performance are key factors in delivering the smallest hearing aids with the best voice quality and feature set.

Plastic Logic has adopted Synopsys' IC Validator product for physical verification of its proprietary organic thin film transistor technology. IC Validator's modern design and advanced hierarchical capabilities allow it to accommodate Plastic Logic's process technology and deliver fast turn-around times on the company's large flexible screen designs.

Synopsys has announced that Nitero achieved first-pass silicon success for its NT4600, the industry's first 60GHz WiFi SoC built for low-power mobile applications, using Synopsys' DesignWare IP, Verification IP and the Galaxy Design Platform. Nitero integrated the PCI Express 2.0 Controller IP in less than one month, gaining a head start over its competition in the fast-moving mobile industry.

Synopsys, Inc today announced the release of its CODE V version 10.7 optical design software, the company's industry-leading software application for the design of high-performance optical systems. The CODE V 10.7 release delivers expanded optimization, design visualization and analysis capabilities that further strengthen the software's support for the creation of manufacturable, cost-effective imaging optics. These capabilities can help enginee...

KYOCERA Document Solutions has accelerated the design of a high-performance DSP for their next-gen multi-function printer using Synopsys' ASIP (Application Specific Instruction-set Processor) design tools. By using tools that automate the design and optimisation of application-specific processors, KYOCERA was able to develop a custom DSP that delivers the high performance required for complex image-processing functions in less than a year, saving...

Synopsys says it has distributed 3000 copies of its Better Software, Faster! book on virtual prototyping to more than 1000 companies. The fast adoption of the book demonstrates how the industry is increasingly looking to virtual prototyping as a method to help develop software much earlier in the design cycle and accelerate project schedules.

A USB 3.1 IP solution, consisting of Synopsys DesignWare USB 3.1 Device Controller, an IP Virtual Development Kit (VDK) and verification IP (VIP) has been designed to accelerate the development of high-performance storage, digital office and mobile system-on-chip (SoC) applications.

Panasonic’s LSI Business Division has achieved first time working silicon using the Synopsys IC Compiler II designed for high-performance multimedia design in 40-nm technology. Compiler II offers 5X faster design implementation that enables faster turn-around-time for large partitions. It has the ability to seamlessly handle more modes and corners drastically improves signoff convergence and reduces ECO iterations.

Synopsys has availability of the silicon-proven DesignWare AEON Few Time Programmable (FTP) Trim Non-Volatile Memory (NVM) IP for TowerJazz 180-nanometer (nm) SL process technology. The NVM IP integrates high voltage generation and control circuitry using a standard CMOS technology without the need for additional masks or processing steps.

Chip maker SK Hynix has addressed their debug challenges by adopting the Synopsys VC Apps open application programming interfaces (APIs) to directly link their internally developed test generation technology to the Synopsys Verdi debug solution and allow their design and verification teams to customise their debug experience and boost debug productivity.

Synopsys has signed a multi-year OEM agreement with Gowin Semiconductor for Synopsys Synplify Pro FPGA synthesis tools. The agreement will enable Gowin customers to improve synthesis runtimes and achieve higher quality of results for timing, area and power for Gowin GW2A/3S FPGAs.