Search results for "tsmc"
Top 10 available wafer fab capacity - December 2015
IC Insights has released its Global Wafer Capacity 2016-2020 report that provides in-depth detail and analysis of IC industry capacity by wafer size, process geometry, region and product type. The report provides a ranking of the industry’s 25 largest IC manufacturers in terms of installed capacity as of December 2015. The top 10 capacity leaders are shown in Figure 1.
Reducing BoM cost of IoT circuits
For SoCs supplied by Lithium-ion or alkaline batteries, the actual voltage ranges from 4.4V, down to 2.0V over their lifetime. They empower IoT devices, which are often put in sleep mode in order to extend their battery life, requiring ultra-low voltage supplies for their Always-on and retention domains.
Advancing drive current in vertical 3D NAND memory devices
At the IEEE IEDM conference last week, imec showed the integration of high mobility InGaAs as a channel material for 3D vertical NAND memory devices formed in the plug (holes) with the diameter down to 45nm. The new channel material improves transconductance and read current which is crucial to enable further VNAND cost reduction by adding additional layers in 3D vertical architecture.
IDMs could top fabless semiconductor company growth
IC Insights' 2016 McClean Report, due to be published in January, will include a ranking of the top-50 semiconductor suppliers’ for 2015 as well as the top-50 fabless semiconductor suppliers. The forecasted “post-merger” top-10 2015 IDM and fabless semiconductor suppliers are covered in this research bulletin.
Semiconductor predictions for 2016
The December forecast from Semiconductor Equipment and Materials International (SEMI), revealed that shipments of semiconductor wafer fab equipment are expected to grow 2.5% in 2016 after 0.5% growth in 2015. However, Gartner is more pessimistic, with its October forecast calling for fab equipment to decline 0.5% in 2015 and drop 2.5% in 2016. Gartner projects the market will return to growth in 2017 through 2019.
Imec improves reliability of deeply-scaled CMOS logic devices
At this week’s IEEE International Electron Devices Meeting 2015, nano-electronics research centerimec presented breakthrough results to increase performance and improve reliability of deeply scaled silicon CMOS logic devices.
MIPI D-PHY IP operates at 2.5Gb/s per lane on TSMC 16FF+ process
Synopsys has announced the industry's first demonstration of MIPI D-PHY IP on TSMC's 16FF+ (16nm FinFET Plus) process operating at 2.5Gb/s per lane. The demonstration shows the DesignWare D-PHY receiver lane connected to Keysight Technologies' test equipment, which provided burst-mode stimulus for stressed eye testing and the transmitter lane connected to the Keysight oscilloscope displaying the transmitter's performance.
TSMC to enter the FanOut business
“The fact that TSMC is interested in advanced packaging isn’t 'new news'," comments Jean-Christophe Eloy, President & CEO, Yole Développement. “Over the last few years TSMC has significantly invested in flip-chip copper pillar capacities (Source: 2015 Flip Chip Business Update report, October 2015) and 3DIC stacking for CMOS image sensors and logic devices.”
First laser arrays monolithically grown on 300mm silicon wafers
Imec and Ghent University present, for the first time, arrays of indium phosphide lasers monolithically integrated on 300mm silicon substrates in a CMOS pilot line. This breakthrough achievement, published in Nature Photonics, provides a path toward high-volume manufacturing of cost-effective PICs with monolithically integrated laser sources. Such laser-powered PICs will revolutionise data transfer between future logic and memory chips.
Can technology maintain its current pace of growth?
With its depth of only 6.7mm, the iPhone 6 holds more processing power than was used by NASA at the time of the 1969 moon landing and over four times that of the Mars Curiosity Rover. Here, Jonathan Wilkins, Marketing Director, European Automation, analyses the rate of technological progress and discusses the validity of Moore’s Law.