Synopsys today announced that X-FAB has expanded its support to include Synopsys’ Galaxy Custom Designer(TM) implementation solution. X-FAB now fully supports Synopsys’ Galaxy(TM) Implementation Platform across its wide range of advanced modular CMOS process technologies for analogue/mixed-signal (AMS) applications.

Tensilica has announced that it now provides out-of-the-box automated design flow support for key technologies within Synopsys' Galaxy Implementation Platform, including DC Ultra RTL synthesis and IC Compiler place-and-route, for Tensilica's new Xtensa 8 and Xtensa LX3 dataplane processors (DPUs). This latest design flow provides up to 15% improvement in processor speed, area and power, in addition to faster design closure over previous Synopsys-...

Synopsys, Inc. today announced that Loongson Technology Co., Ltd. achieved first-pass silicon success on its 65nm, multicore, high performance Loongson-3 CPU design using Synopsys’ CustomSim circuit simulator. The CustomSim solution was successfully deployed for timing and dynamic power simulation of advanced full-custom blocks, PLL, HyperTransport, register file, and content-addressable memory. The CustomSim solutions’s SPICE-level precisio...

Synopsys has announced that Hisilicon Technologies Co., Ltd., a worldwide provider of ASICs and solutions for communication network and digital media, and a subsidiary of Huawei Technologies, has established Synopsys as its primary EDA partner across its implementation and verification design flows. Hisilicon has signed an expanded business agreement to extend its use of Synopsys' IC Compiler place-and-route technology and DesignWare(R) IP as wel...

Synopsys, Inc. today announced the release of a broad range of data converter IP solutions for 40 nanometer (nm) process technologies. The IP is targeted at broadband wireless communications, wired communications and video designs requiring high-performance, ultra-low power consumption and very compact area. With this latest addition, Synopsys' DesignWare Data Converter IP portfolio now offers more than 100 data converter IP products comprised of...

Synopsys has announced that Realtek Semiconductor Corp, a leading provider of advanced IC products for communications network, computer peripheral and multimedia applications, has signed an expanded business agreement establishing Synopsys as its primary EDA partner. Under the new multi-year agreement, Realtek has extended its use of Synopsys’ Galaxy Implementation, Discovery Verification and Confirma Rapid Prototyping Platforms, as well as Syn...

Synopsys has announced that Arrow Electronics successfully deployed Synopsys’ TetraMAX automatic test pattern generation (ATPG) with multicore processing to significantly reduce the time needed to generate high quality manufacturing tests. Stringent quality goals combined with increasing design complexity stimulated the need to improve ATPG performance at Arrow. By utilising TetraMAX ATPG’s multicore processing capability on their quad-core ...

Synopsys has announced a new capability in DFTMAX compression that significantly reduces the cost of test for designs and methodologies that mandate very few test pins. Extending Synopsys’ patented adaptive scan technology with a high-performance, low-pin interface to the tester allows designers to achieve predictable compression of up to 100X or more with only one pair of test data pins. As designers must maintain test quality and reduce test ...

Synopsys, Inc has announced the addition of the new DesignWare USB 2.0 picoPHY IP to its USB 2.0 PHY IP product line that has been successfully deployed in more than 300 customer designs, and in more than 50 different process technologies ranging from 180nm to 32nm. Targeted at mobile and high-volume consumer applications such as feature-rich smartphones, mobile internet devices and netbooks, the DesignWare USB 2.0 picoPHY supports advanced 28nm ...

Synopsys, Inc, a leader in software and IP for semiconductor design, verification and manufacturing, today announced the availability of its 40th audio codec IP with the release of the DesignWare 96 dB Hi-Fi Audio IP in the SMIC 65-nanometer (nm) process. Synopsys has been a leading provider of audio IP for more than twelve years and provides designers with high-quality audio IP solutions supporting 20 different process nodes, from 180-nanomenter...

Synopsys, Inc has announced that NVIDIA Corp. has adopted Synopsys' Yield Explorer solution for yield analysis and yield ramp. NVIDIA, which invented the graphics processing unit, selected Yield Explorer because of its ability to coherently combine and cross-correlate large volumes of data from the design, fab and test domains to quickly identify dominant failure mechanisms. This is accomplished through volume diagnostics based on TetraMAX ATPG ...

Synopsys, Inc. has announced the expansion of its verification collaboration with Freescale. The integration of complex hardware enabled by Moore’s law, IP, and embedded software content in modern devices is causing a rapid increase in verification complexity. Freescale and Synopsys have broadened their ongoing collaboration to manage this growing complexity. In addition to verification performance, efficiency, and methodology, the expanded col...

Synopsys, Inc. today announced that it has created an optimised reference implementation methodology for the ARM Cortex-A8 processor that achieves greater than 2GHz (4000 DMIPS) at 540mW. This result was accomplished by combining optimised methodology, tools and ARM Physical IP to enable new classes of mobile and tethered devices requiring the combination of high performance and energy efficiency.

Synopsys has introduced its Synphony HLS (High Level Synthesis) solution that integrates M-language and model-based synthesis to deliver up to 10X higher design and verification productivity than traditional RTL flows for communications and multimedia applications. Synphony HLS creates optimised RTL for ASIC and FPGA implementation, architecture exploration and rapid prototyping. In addition, Synphony HLS complements C/C++-based flows by generat...

Synopsys has announced that STMicroelectronics (ST) has achieved first-pass silicon success for its STM32 Connectivity Line of system-on-chips (SoCs) utilising the Synopsys DesignWare USB 2.0 On-The-Go (OTG) and Ethernet digital controllers. ST, a global leader in developing and delivering SoC and semiconductor solutions, evaluated several IP vendors and selected Synopsys DesignWare IP solutions because they are high-quality, include the right fe...

Synopsys has announced that the U.S. Department of Energy’s National Renewable Energy Laboratory (NREL), a leading government laboratory pursuing research in photovoltaic devices, has adopted Synopsys’ Sentaurus TCAD for simulating solar cell characteristics to improve performance.

Synopsys, Inc, a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that the Common Platform technology alliance, a unique technology collaboration between IBM, Chartered Semiconductor Manufacturing and Samsung Electronics, has qualified IC Validator for 32-nanometer (nm) process design rule checking on Common Platform technology. Synopsys and the Common Platform companies are continuing wi...

Synopsys has announced its new StarRC Custom parasitic extraction solution for analogue mixed-signal (AMS) and custom digital IC design. By combining the gold standard Star-RCXT extraction technologies and the Raphael NXT 3D fast field solver into a single, unified extraction solution, the StarRC Custom solution offers high performance runtime with tuned accuracy to meet the analysis demands of high sensitivity custom circuits.

Synopsys has announced that Sunplus Technology Co., Ltd, a leading provider of advanced IC solutions for home entertainment applications, has signed an expanded business agreement to establish Synopsys as its primary EDA partner. Under the new multi-year agreement, Sunplus has consolidated on Synopsys’ Galaxy Implementation and Discovery Verification Platforms for their chip development and design flows, and has extended its use of Synopsys Des...

Synopsys has announced that TSMC has adopted Synopsys’ HSIM hierarchical FastSPICE circuit simulator for its sub-40nm memory intellectual property (IP) characterisation flow. The HSIM simulator will be deployed for TSMC advanced SRAM compilers for timing, power simulation, dynamic IR drop and EM analysis, as well as for full-chip simulation with extracted package models. Using the latest version of the HSIM tool, TSMC is able to improve memory ...