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Synopsys Inc

  • 700 East Middlefield Road Mountain View
    CA 94043
    United States of America
  • 001 650 584-5000
  • http://www.synopsys.com

Synopsys Inc Articles

Displaying 681 - 700 of 800
Design
17th November 2010
Synopsys' IC Validator Completes Qualification for TSMC's 40-nm and 65-nm iDRC/iLVS Physical Verification

Synopsys announced that its IC Validator physical verification product is qualified for TSMC's 40-nm and 65-nm interoperable DRC/LVS runsets, and is immediately available to TSMC customers. IC Validator, part of the Galaxy™ Implementation Platform, is an ideal add-on to IC Compiler for In-Design physical verification. By enabling physical verification within the implementation flow, IC Validator enables place and route engineers to accelerate t...

Design
17th November 2010
Synopsys Expands EDA's Largest Users Group to Include Conferences in Ottawa and Austin

Synopsys recently expanded the SNUG program to include events in Ottawa and Austin, making the conferences more accessible and relevant to a greater number of its customers. Bringing SNUG to the backyards of additional customers underscores the value that Synopsys sees in these popular gatherings, and the strong attendance numbers and enthusiastic participation confirm that users also find value in participating in these live events, says Al Czam...

Design
15th November 2010
Synopsys and SMIC Team to Deliver Proven SoC Design Solution for 65-nm to 40-nm Process Nodes

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, and Semiconductor Manufacturing International Corporation (SMIC; NYSE: SMI; SEHK: 981), today announced that they have delivered a comprehensive solution for system-on-chip (SoC) design for SMIC's advanced 65-nanometer (nm) process. The solution integrates Synopsys' broad DesignWare™ interface and analog IP portfolio plus o...

Analysis
12th November 2010
Synopsys NanoTime Enables Full Chip Transistor Level Timing Analysis on Cavium Networks OCTEON II Internet Application Processor

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today reported that Cavium Networks, Inc. used NanoTime transistor-level static timing analysis (STA) solution to achieve full-chip STA signoff for its next-generation internet application processor, OCTEON II that is shipping now.

Analysis
11th November 2010
Synopsys in Armenia Among Twelve Finalists to Receive U.S. Secretary of State's 2010 Award for Corporate Excellence (ACE)

Synopsys, Inc a world leader in software and IP for semiconductor design, verification and manufacturing, announced today that the U.S. State Department has recognized Synopsys in Armenia among 12 finalists worldwide for the U.S. Secretary of State's prestigious 2010 Award for Corporate Excellence. The finalists were chosen from a record number of 78 nominations submitted by American ambassadors around the world. ACE finalists are international b...

Analysis
4th November 2010
San Francisco State University Receives Charles Babbage Grant from Synopsys

Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that San Francisco State University (SF State) is the latest university to receive the Charles Babbage Grant from Synopsys. Through the grant, the School of Engineering received licenses of Synopsys' comprehensive electronic design automation (EDA) software and intellectual property, along with curriculum supp...

Design
2nd November 2010
Synopsys' DesignWare STAR ECC IP Helps Reduce Embedded Memory Transient Errors

Synopsys announced the availability of the DesignWare STAR ECC (Self-Test and Repair Error Correcting Codes) IP as a part of its DesignWare STAR Memory System® product family. The new DesignWare STAR ECC IP offers a highly automated design implementation and test diagnostic flow that helps system-on-chip (SoC) designers to quickly reduce the number of embedded memory transient errors, such as soft errors, that occur in emerging semiconductor pro...

Design
2nd November 2010
Synopsys’ silicon-proven DesignWare HDMI 1.4a Tx controller and PHY IP receive HDMI certification

Synopsys announced that Synopsys’ DesignWare High-Definition Multimedia Interface(tm) (HDMI(tm)) 1.4a Transmitter (Tx) digital controller and PHY IP solutions in the 40nm process node have achieved certification from an HDMI Authorized Training Center (ATC). The DesignWare HDMI PHY IP achieved HDMI 1.4a compliance by passing all process, voltage and temperature variation tests, which are key certification requirements for environmental robustn...

Pending
2nd November 2010
Carl Zeiss and Synopsys collaborate on in-die registration metrology for photomask manufacturing

Carl Zeiss SMS GmbH, a leading supplier for photomask metrology and repair tools and Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced a collaboration to support the ZEISS tool family for in–die metrology solutions for the 32nm technology node and below. Synopsys will offer support for ZEISS’ PROVE(tm), the next-generation registration metrology tool, th...

Design
2nd November 2010
Synopsys Expands Synthesis-Based Test Technology to Increase Designer Productivity

Synopsys announced plans to expand test technology embedded in Synopsys' RTL synthesis to address the need for higher defect coverage, lower test cost and faster yield analysis while simultaneously minimizing the impact on design goals and project schedules. Design teams currently using Synopsys' RTL synthesis and test solution are able to quickly implement compression to lower digital logic test costs, handle pin-limited test methodologies and e...

Design
28th October 2010
Synopsys' Silicon-Proven DesignWare HDMI 1.4a Tx Controller and PHY IP Receive HDMI Certification

Synopsys, Inc. today announced that Synopsys' DesignWare High-Definition Multimedia Interface 1.4a Transmitter (Tx) digital controller and PHY IP solutions in the 40-nanometer (nm) process node have achieved certification from an HDMI Authorized Training Center (ATC). The DesignWare HDMI PHY IP achieved HDMI 1.4a compliance by passing all process, voltage and temperature variation tests, which are key certification requirements for environmental...

Design
27th October 2010
Synopsys Power-Aware Test Speeds Time to Volume Production at Realtek

Synopsys announced that Realtek Semiconductor Corporation, one of the world's leading network and multimedia IC providers, deployed Synopsys power-aware test to avoid power issues during test and accelerate production testing of its new digital media processor. Excessive power consumption during manufacturing test leads to overheating, IR drop, and other effects that can cause devices to fail, impacting profitability and delaying production ramp...

Design
27th October 2010
Himax Standardizes on Synopsys Implementation, Verification and IP Solutions for Video SoC Products

Synopsys announced that Himax Technologies, Inc., a leading provider of advanced semiconductors for flat panel displays, has selected Synopsys' Galaxy™ Implementation and Discovery™ Verification Platforms for its video system-on-chip (SoC) products. As part of an expanded business agreement to establish Synopsys as its primary EDA partner, Himax has also extended its use of Synopsys DesignWare® IP.

Analysis
21st October 2010
Synopsys Awarded TSMC's 'Interface IP Partner of the Year'

Synopsys, announced that it received TSMC's inaugural Interface IP Partner of the Year Award. The award recognizes Synopsys' superior performance in the TSMC IP Alliance. Synopsys was selected based on customer feedback, TSMC-9000 compliance, technical support excellence and customer IP usage. Synopsys' DesignWare interface IP portfolio consists of widely used protocols such as USB, DDR, PCI Express®, HDMI, MIPI, SATA and Ethernet.

Design
13th October 2010
Synopsys CustomSim Selected by GSI Technology for High-Speed SRAM Simulation

Synopsys announced that GSI Technology, a leader in high-density, high-speed monolithic SRAMs, has selected Synopsys' CustomSim FastSPICE solution for the development and verification of its leading-edge designs. GSI Technology's 144-megabit (Mbit) SigmaQuad SRAMs achieve data bandwidths in excess of 72 gigabits per second (Gbps). In order to maximize yield with such aggressive timing specifications, extensive full-chip transistor-level simulati...

Design
13th October 2010
100 Tapeouts Underscore Rapid and Broad Acceptance of Synopsys' In-Design Physical Verification

Synopsys today announced that its award-winning Galaxy Implementation Platform product, IC Validator, for In-Design physical verification within IC Compiler, has been successfully used for more than 100 tapeouts at advanced process nodes. Coming so soon after IC Validator's 2009 launch, this milestone is a strong indicator of the requirement for a different physical verification use model. In contrast to the traditional stand-alone physical verif...

Analysis
10th October 2010
Synopsys Acquires Optical Research Associates

Synopsys has acquired Optical Research Associates (ORA®), a privately held leading provider of optical design software and optical engineering services. The addition of ORA's expertise, technology and products will allow Synopsys to move into the rapidly growing markets associated with displays and solid state lighting using light emitting diodes (LEDs), as well as expand into markets such as semiconductor lithography equipment and cameras. This...

Design
27th September 2010
Synopsys Enhances Synplify FPGA Synthesis Software With up to 4X Faster Runtime and New Team-Design Capabilities

Synopsys announced the availability of enhancements to its Synplify Pro® and Synplify® Premier FPGA synthesis tools. The new features in the 2010.09 release shorten logic synthesis runtimes and enable faster post-netlist incremental design turns. Comprehensive support for Synopsys DesignWare® Library datapath and building blocks components enables the use of common RTL from prototype to production. In addition, a unique team-design interface a...

Design
20th September 2010
Synopsys HSPICE Precision Parallel technology delivers up to 7X speed-up for analogue/mixed-signal designs

Synopsys unveiled new HSPICE(r) Precision Parallel (HPP) multi-threading technology that delivers up to 7X simulation speed-up for complex analogue and mixed-signal designs. In addition to the new HPP technology, the HSPICE 2010 solution includes enhanced convergence algorithms, advanced analogue analysis features and foundry-qualified support for process design kits (PDKs) that extend HSPICE gold-standard accuracy to the verification of complex ...

Design
14th September 2010
eMemory standardises on Synopsys FastSPICE for circuit simulation

Synopsys today announced that eMemory Technology, Inc. has selected Synopsys’ CustomSim solution for all of its circuit simulation needs. On a 45 nanometer (nm) embedded non-volatile memory, the CustomSim solution demonstrated up to 2 times faster simulation runtime compared to other commercial FastSPICE tools, and delivered results tightly correlated to silicon data. Based on these results, CustomSim is now used in verification production flow...

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