Search results for "Synopsys"
Synopsys’ DesignWare Sonic Focus IP solutions deliver exceptional sound through standard speakers
Synopsys announced the availability of two new DesignWare Sonic Focus IP products that enable system-on-chip (SoC) designers and original equipment manufacturers (OEMs) to significantly enhance audio quality and deliver an immersive audio experience for a broad range of low power, DSP-based consumer electronics devices. The DesignWare Sonic Focus Stereo and Stereo HD (High-Definition) IP are audio post-processing solutions that help restore clari...
Synopsys - Android Operating System Support for DesignWare ARC Processor Cores
Synopsys announced Android operating system (v2.2 FroYo) support for the DesignWare™ ARC™ 750D processor core. The DesignWare ARC 750D host processor, which runs at 1.1 GHz and delivers 1800 DMIPs in an industry standard 40-nanometer (nm) process, is an ideal choice for designers requiring a high-performance, low-power and cost-effective microprocessor to drive Android-based applications. The DesignWare ARC 750D processor now allows designers...
Lattice Announces Update, More Accessible CPLD Design Tools
Lattice Semiconductor has announced the immediate availability of Version 1.3 of its ispLEVER Classic design tool suite. Version 1.3 includes updated support for Lattice CPLDs (Complex Programmable Logic Devices), including the widely popular ispMACH 4000 device family. Designers can quickly download, for free, ispLEVER Classic for Windows, as well as optional Synopsys Synplify logic synthesis and Aldec Active-HDL simulator modules from: www.latt...
Lattice's New Mixed Signal Design Software Simplifies Platform Management Design
Lattice Semiconductor Corporation has announced release 6.1 of its PAC-Designer® mixed signal design software, This integration of the PAC-Designer 6.1 and Diamond 1.3 design software tools will make more advanced digital design options available with Platform Manager products. An automated simulation environment, not previously available to Platform Manager designers, is a primary benefit of the design software integration.
MOSIS to offer multi-project wafer services for IBM’s 0.180um high voltage process
MOSIS has announced that it will commence multi-project wafer (MPW) runs using IBM’s new 0.18um high voltage process. The technology meets the growing demand for ICs to provide a high voltage capability in low power hand-held products. Typical applications include power management ICs for portable devices such as PDAs and cellphones as well as low cost integrated controllers for automotive, medical and industrial designs.
LSI Honors Outstanding Strategic Suppliers
LSI is honoring 18 world-class suppliers for their exceptional support in helping LSI meet its goal to be a technology leader while remaining cost competitive. STATS ChipPAC Ltd. was named “Strategic Partner of the Year” and was one of three companies designated “Best-in-Class” in recognition of their excellent value as full system suppliers, and for their design capabilities and aggressive pursuit of cost reductions.
Xilinx ISE Design Suite 13.2 Steps Up Designer Productivity and Brings Partial Reconfiguration to Kintex-7, Virtex-7 FPGAs
Xilinx released ISE Design Suite 13.2, providing support for the 28nm 7 series families including the recently arrived Virtex-7 VX485T device being demonstrated to customers.
Forte Design Systems Names Mike Arai, President, General Manager of Japan Office
Forte Design Systems, a leading provider of High-Level Synthesis software, today appointed Masayuki (Mike) Arai to the position of president and general manager of Forte Design Systems KK in Yokohama, Japan.
Tensilica Delivers New Design Flow Support for Synopsys’ Galaxy Implementation Platform Technologies
Tensilica, Inc. today announced that it now provides out-of-the-box automated design flow support for key technologies within Synopsys' Galaxy Implementation Platform, including DC Ultra RTL synthesis and IC Compiler place-and-route, for Tensilica's new Xtensa 8 and Xtensa LX3 dataplane processors (DPUs). This latest design flow provides up to 15% improvement in processor speed, area and power, in addition to faster design closure over previous S...
LeCroy Introduces Simulation Design Verification Tool for PCI Express 3.0 Protocol Analysis
LeCroy Corporation today announced a significant expansion of its PCI Express 3.0 protocol testing focus with the addition of a new analysis tool. The new software tool, named SimPASS, addresses the pre-silicon simulation and design verification phases of development. SimPASS is based on the existing LeCroy graphical user interface for display and analysis of data traffic, and extends the powerful data traffic analysis capabilities commonly used ...