Search results for "Synopsys"
TSMC selects Synopsys HSIM Simulator for sub-40nm memory IP characterisation
Synopsys has announced that TSMC has adopted Synopsys’ HSIM hierarchical FastSPICE circuit simulator for its sub-40nm memory intellectual property (IP) characterisation flow. The HSIM simulator will be deployed for TSMC advanced SRAM compilers for timing, power simulation, dynamic IR drop and EM analysis, as well as for full-chip simulation with extracted package models. Using the latest version of the HSIM tool, TSMC is able to improve memory ...
Ubixum achieves product-ready design at first silicon with Synopsys Galaxy Custom Designer solution
Synopsys has announced that Ubixum has used Synopsys’ Galaxy Custom Designer implementation solution to successfully design its latest advanced image sensor chip. The chip has been verified to be product-ready with first silicon. Custom Designer is a modern-era custom implementation solution that delivers superior ease-of-use and leverages Synopsys’ Galaxy Implementation Platform to provide a unified solution for custom and digital designs. T...
Synopsys claimed industry's first SystemC TLM-2.0 SuperSpeed USB 3.0 models
Synopsys announced the availability of SuperSpeed USB 3.0 transaction-level models (TLM) supporting the Open SystemC Initiative (OSCI) TLM-2.0 API specification. The models are TLM representations of the Synopsys DesignWare(r) SuperSpeed USB 3.0 Device and xHCI Host Controller IP. The SuperSpeed USB 3.0 models enable pre-RTL and pre-silicon software development, verification and architecture exploration. They are part of the DesignWare System-Lev...
X-FAB now supports Synopsys Galaxy Custom Designer
Synopsys today announced that X-FAB has expanded its support to include Synopsys’ Galaxy Custom Designer(TM) implementation solution. X-FAB now fully supports Synopsys’ Galaxy(TM) Implementation Platform across its wide range of advanced modular CMOS process technologies for analogue/mixed-signal (AMS) applications.
TSMC selects Synopsys Galaxy Implementation Platform for Integrated Sign-Off Flow
Synopsys has announced that TSMC selected Synopsys’ Galaxy Implementation Platform for its new Integrated Sign-Off Flow. The RTL-to-GDSII design flow deploys the advanced optimisation technologies of Synopsys’ Design Compiler synthesis and IC Compiler physical implementation solutions, and the PrimeTime sign-off and Star-RCXT extraction solutions—the industry yardsticks for IC design sign-off. The new flow is now available for 65nm designs ...
Synopsys SmartDRD technology brings automation to custom layout design rule checking
Synopsys announced that it has enhanced its Galaxy Custom Designer solution with the addition of SmartDRD, an innovative design-rules-driven technology. SmartDRD technology enables layout engineers to more quickly achieve design-rule-check (DRC) clean designs with significantly reduced effort for analogue and custom designs. SmartDRD automates many DRC repair tasks, reducing hours of manual effort to mere seconds.
Synopsys' Design Compiler 2010 doubles productivity of synthesis and place and route
Synopsys introduced Design Compiler 2010, the latest RTL synthesis innovation within the Galaxy Implementation platform, which delivers a twofold speedup in the synthesis and physical implementation flow. To meet aggressive schedules for increasingly complex designs, engineers need an RTL synthesis solution that enables them to minimise iterations to speed up physical implementation. To address these challenges, topographical technology in Design...
Synopsys Launches MIPI DigRF(SM) v4 IP
Synopsys announced the immediate availability of the DesignWare MIPI 4G DigRF(SM) Master Controller IP. By complementing its current silicon-proven DesignWare MIPI 3G DigRF Controller and PHY IP, Synopsys becomes the first vendor to offer a comprehensive IP portfolio for both the MIPI DigRF v3 and v4 standards. The configurable MIPI 4G DigRF Master Controller is compliant to the recently ratified MIPI DigRF v4 1.00 specification and enables desig...
HAPS-60 Series from Synopsys deliver highest performance, highest capacity, pre-tested IP and unique advanced verification functionality
Synopsys introduced the HAPS-60 series of rapid prototyping systems—a comprehensive solution that eases complex SoC design and verification challenges. The HAPS-60 series, part of the Confirma(tm) Rapid Prototyping Platform, is an easy-to-use and cost-effective rapid prototyping system that enables early hardware/software co-verification and system-level integration at near-real-time run-rates, using at-speed, real-world interfaces.
Synopsys’ silicon-proven DesignWare HDMI 1.4a Tx controller and PHY IP receive HDMI certification
Synopsys announced that Synopsys’ DesignWare High-Definition Multimedia Interface(tm) (HDMI(tm)) 1.4a Transmitter (Tx) digital controller and PHY IP solutions in the 40nm process node have achieved certification from an HDMI Authorized Training Center (ATC). The DesignWare HDMI PHY IP achieved HDMI 1.4a compliance by passing all process, voltage and temperature variation tests, which are key certification requirements for environmental robustn...