Search results for "Synopsys"

Synopsys has announced the next phase of its work with NVIDIA to accelerate chip design up to 30x with the NVIDIA Grace Blackwell platform.

Synopsys will host its annual flagship user group conference, SNUG Silicon Valley, 19-20thMarch 2025, at the Santa Clara Convention Center. This year, the first day of SNUG will also feature an inaugural, invite-only Synopsys Executive Forum.

Synopsys has announcedthe availability of Synopsys Virtualizer Native Execution on Arm-based hardware, transforming software development for Edge devices by substantially1accelerating virtual prototype execution and deployment. This innovation delivers new, advanced capabilities that improve the productivity of engineering teams building software-defined products in the automotive, high-performance computing (HPC), and Internet of Things (IOT) in...

Synopsys and Vector Informatik have announced a strategic collaboration to accelerate the automotive industry’s transformation to software-defined vehicles (SDVs).

Synopsys and SEMI Foundation announced signing a Memorandum of Understanding (MoU) at Synopsys' headquarters in California.

Synopsys announced the expansion of its hardware-assisted verification (HAV) portfolio with new HAPS prototyping and ZeBu emulation systems using the latest AMD Versal Premium VP1902 adaptive SoC.

Synopsys and SiMa.ai have announced a strategic collaboration to jointly deliver a new solution for automotive companies to accelerate the development of workload-specific silicon and software needed to power artificial intelligence-enabled features in next-generation automobiles.

Synopsysannounces its continued, close collaboration with TSMC to deliver advanced EDA and IP solutions on TSMC's most advanced process and 3DFabric technologies to accelerate innovation for AI and multi-die designs.

The European Commission (EC) has approved Synopsys’ proposed acquisition of Ansys in Phase 1.

Synopsys has announced the industry's first Ultra Ethernet IPand UALink IP solutions, including controllers, PHYs, and verification IP, to meet the demand for standards-based, high-bandwidth, and low-latency HPC and AI accelerator interconnects.