Search results for "chiplet"
Cadence and Samsung Foundry to expand design IP portfolio
Cadence Design Systems, Inc. has signed a multi-year agreement with Samsung Foundry to expand the availability of Cadence’s design IP portfolio on Samsung Foundry’s SF5A process technology, the latest 5nm process variant to support automotive applications.
Keysight debuts PCIe 6.0 protocol validation tools
Keysight Technologies says it has introduced the first PCI Express (PCIe) 6.0protocol validation tools.
Winbond joins UCIe Consortium to support chiplet interface standardisation
Winbond has joined the UCIe (Universal Chiplet Interconnect Express) Consortium, the industry Consortium dedicated to advancing UCIe technology.
AMD’s most powerful professional graphics cards
The AMD Radeon PRO W7900 and Radeon PRO W7800 graphics cards are now available for purchase.
SEMI Korea Summit showcases future of advanced packaging
With advanced packaging a key enabler of semiconductor innovation, the stage is set for the ‚Advanced Packaging Summit‘as industry pioneers and visionaries gather 5 September 2023 at the Suwon Convention Centre for insights into critical themes including advances in high-performance computing (HPC).
Cadence tapes out 16G UCIe advanced package IP on TSMC’s N3E process technology
Cadence Design Systems has announced the tapeout of Cadence 16G UCIe 2.5D advanced package IP on TSMC’s 3nm (N3E) process technology.
Synopsys, TSMC and Ansys strengthen ecosystem collaboration
Accelerating the integration of heterogeneous dies to enable the next level of system scalability and functionality, Synopsys has strengthened its collaboration with TSMC and Ansys for multi-die system design and manufacturing.
AMD introduces large FPGA-based adaptive SoC
AMD has announced the Versal Premium VP1902 adaptive system-on-chip (SoC), its largest adaptive SoC.
SEMI 3D & Systems Summit 2023 opens with HI and SiP solutions
3D integration and systems for semiconductor manufacturing applications will take centre stage at SEMI 3D & Systems Summit as the event opens with experts sharing the latest developments and insights into the 3D roadmap, heterogeneous integration (HI) and system-in-package (SiP) technologies for smarter systems. Registration is open for the 26th – 28th June summit in Dresden, Germany.
Ventana Micro selects Imperas Solutions for RISC-V processor verification
Imperas have announced that Ventana Micro has selected Imperas simulation and test and verification solutions for the RISC-V processors under development as IP cores and chiplets.