Search results for "Synopsys"
Synopsys unveils StarRC Custom parasitic extraction solution
Synopsys has announced its new StarRC Custom parasitic extraction solution for analogue mixed-signal (AMS) and custom digital IC design. By combining the gold standard Star-RCXT extraction technologies and the Raphael NXT 3D fast field solver into a single, unified extraction solution, the StarRC Custom solution offers high performance runtime with tuned accuracy to meet the analysis demands of high sensitivity custom circuits.
Yamaha tapes out its latest Graphics LSI Chip with Synopsys Design Compiler Graphical
Synopsys announced that Yamaha, a leading provider of mobile audio and Graphics LSI chip products, achieved their aggressive performance targets ahead of schedule with Design Compiler(R) Graphical and successfully taped out their latest Graphics LSI chip.
APAC IC adopts Synopsys Galaxy Custom Designer
Synopsys announced that APAC IC Layout Consultant, Inc., a global provider of IC physical design services, has adopted Synopsys’ Galaxy Custom Designer implementation solution. APAC IC, based in the Philippines, benefited from the ease with which Galaxy Custom Designer can be adopted to quickly achieve high productivity for its team of layout engineers servicing a worldwide customer base.
Synopsys launches DesignWare HDMI 1.4 Tx/Rx controller and PHY IP solutions for 40nm process technologies
Synopsys announced the availability of high quality DesignWare High-Definition Multimedia Interface (HDMI) 1.4 transmitter (Tx) and receiver (Rx) digital controllers and PHY IP solutions that are compliant to the standard specification. With full support for new features of the HDMI 1.4 specification including HEAC, 3D formats, real-time content signaling, 4K x 2K resolution and 10.2 Gbps aggregate bandwidth, the DesignWare HDMI IP enables design...
Achronix deploys Synopsys IC Validator and IC Compiler for next generation FPGA design
Synopsys has announced that Achronix Semiconductor Corporation, maker of ultra-fast field-programmable gate arrays (FPGAs), has deployed Synopsys’ IC Compiler and the recently announced IC Validator, the newest addition to the Galaxy(TM) Implementation Platform, for designing their next generation of high end FPGAs.
Synopsys introduces IC Compiler In-Design Rail Analysis to accelerate design closure
Synopsys has introduced its In-Design Rail Analysis capability to accelerate design closure. Part of Synopsys’ IC Compiler in-design ecosystem, In-Design Rail Analysis utilises embedded PrimeRail analysis and fixing guidance technology to enable designers to easily perform power network verification throughout physical implementation. By identifying and fixing voltage-drop and electromigration issues earlier in the flow, designers can eliminate...
Achronix selects Synopsys as its leading EDA partner
Synopsys has announced that Achronix Semiconductor Corporation, maker of ultra-fast field-programmable gate arrays (FPGAs), has signed an expanded business agreement to establish Synopsys as its leading EDA partner for the design of its next generation FPGAs. As a result of the new multi-year agreement, Achronix has consolidated on Synopsys’ Galaxy Implementation and Discovery Verification Platforms throughout its internal development and desig...
Synopsys continues Galaxy Custom Designer momentum with 2009.06 release
Synopsys has announced availability of advanced analogue simulation and layout capabilities in its Galaxy Custom Designer(tm) implementation solution. The new features in the 2009.06 release deliver productivity advances to aid analogue circuit designers and layout engineers, enabling Synopsys to further extend its reach in the custom implementation segment.
Synopsys Unveils StarRC Custom 3D Extraction Delivering 20X Speedup
Synopsys unveiled Rapid3D technology, a new 3D fast field solver engine fully integrated into Synopsys' StarRC™ Custom parasitic extraction solution. Building on the gold standard Raphael NXT engine, Rapid3D technology delivers attofarad accuracy and significant speedup by incorporating the latest advancements in 3D field solver algorithms. These algorithms take full advantage of modern multicore hardware to solve the accuracy and runtime chal...
Synopsys Announces Synphony HLS Support for Xilinx Virtex-6 FPGAs
Synopsys, Inc. today announced that its Synphony HLS (High Level Synthesis) product now includes optimized support for Xilinx Virtex-6 FPGAs. The high level synthesis flow provides Virtex-6 FPGA users with more automatic target-specific optimizations and architecture exploration from high level models and delivers up to 10X higher design and verification productivity than traditional RTL flows for communications and multimedia applications.