Search results for "EDA"
Major New Functionality for SI/PI Engineers in CST PCB STUDIO 2012
Computer Simulation Technology (CST) will be previewing the new release of CST PCB STUDIO 2012 at DesignCon 2012, booth #403. Signal and Power Integrity (SI/PI) engineers working on the design of power distribution systems will benefit from the latest additions to CST PCB STUDIO (CST PCBS), the CST STUDIO SUITE tool for fast post-layout analysis.
Cycleo Hires VP of Sales and Extends its Reach into North America
Cycleo SAS, a provider of innovative semiconductor IP targeting wireless long range applications, today announced the appointment of François Sforza to the position of Cycleo VP of Sales. Cycleo also announced that it has engaged EDA Sales Inc as its distributor for the USA (West Coast).
Cadence to Unveil OrCAD Capture Marketplace with Industry-first Online Apps; Puts a PCB Design ‘Universe’ at Engineers’ Fingertips
Cadence Design Systems, Inc. (NASDAQ: CDNS), a leader in global electronic design innovation, today unveiled OrCAD Capture Marketplace, a unique Web-enabled environment that brings a complete PCB ecosystem—including an industry-first online store for applications—to engineers’ fingertips.
Cadence Opens and Extends Verification IP Catalog for Use Across Silicon, SoC and System Development
Cadence Design Systems Inc detailed the extensive expansion of its broad portfolio of verification IP and memory models, which delivers a robust verification solution spanning silicon, SoC and system development. The Cadence VIP offering boasts support of new protocols such as ARM AMBA 4 and MIPI to address early IP verification and integration through to system validation in demonstration of the EDA360 vision. In addition to memory models and VI...
Cadence Issues Blueprint to Battle ‘Profitability Gap’; Counters Semiconductor Industry’s Greatest Threat
Cadence Design Systems today laid out a new vision for the semiconductor industry, EDA360. In outlining an application-driven approach to system design and development, Cadence issued a challenge to the semiconductor and electronic design automation (EDA) communities to address the growing “profitability gap” that threatens the vitality of the electronics industry.
Cadence Allegro Technology Boosts Productivity and Predictability for Silicon, SoC and System Developers
Cadence Design Systems introduced the latest version of its Allegro PCB and IC packaging technology, delivering new capabilities that provide a significant increase in both productivity and predictability across silicon, SoC and system development.
Bosch Deploys Cadence Unified Custom/Analog Flow to Gain Overall Design Productivity
Cadence Design Systems today announced that Robert Bosch GmbH (Bosch) has standardized on an enhanced custom/analog flow based on Cadence® Virtuoso® v6.1 technology, gaining approximately a 25 percent advantage in productivity for advanced custom/analog silicon design.
Cadence Marks Annual Innovation Day with Honors for its Top Technology Leaders
Cadence Design Systems today is celebrating Innovation Day, honoring the contributions Cadence employees have made to the company and the electronics industry as a whole. Having garnered more than 800 U.S. patents and an additional 150 international patents, Cadence has a long legacy of technology innovation that has enabled EDA customers to successfully create some of the world’s most recognized consumer and business products for over 20 years...
Spreadtrum Standardizes on Cadence Design Flow and Achieves One-Pass Silicon Realization for Its First 40nm Product
Cadence Design Systems today announced that Spreadtrum Communications (NASDAQ: SPRD), a leading provider of baseband and RF processor solutions for the wireless communications market headquartered in Shanghai, migrated to the Cadence® Silicon Realization flow and successfully taped out its first 40-nanometer low-power chip. The chip, a GSM/GPRS/EDGE/TD-SCDMA/HSPA mobile phone baseband, was taped out with one-pass silicon success.
SMIC Adopts Cadence DFM and Low-power Silicon Realization Technology for 65-Nanometer Reference Flow
Cadence Design Systems today announced that Semiconductor Manufacturing International Corporation (SMIC, NYSE: SMI and SEHK: 981), the largest semiconductor foundry in China, has adopted Cadence® Silicon Realization products for the design-for-manufacturing (DFM) and low-power technology at the core of SMIC’s 65-nanometer Reference Flow 4.1. Using Cadence Encounter Digital Implementation System as the foundation, the companies collaborated to ...