Search results for "EDA"
Synopsys Honors Shrenik Mehta with Eleventh Annual Tenzing Norgay Interoperability Achievement Award
Synopsys announced today that Shrenik Mehta has been awarded Synopsys' eleventh annual Tenzing Norgay Interoperability Achievement Award. As chairperson of Accellera, a leading standards organization in electronic design automation (EDA), from 2005 until 2010, Shrenik guided the organization to several collaborative initiatives that created widely-used standards such as SystemVerilog, Unified Power Format (UPF), and Universal Verification Methodo...
Synopsys Posts Financial Results for Fourth Quarter and Fiscal Year 2010
Synopsys today reported results for its fourth quarter and fiscal year 2010. For the fourth quarter of fiscal 2010, Synopsys reported revenue of $375.5 million, compared to $338.3 million for the fourth quarter of fiscal 2009. Revenue for fiscal year 2010 was $1.38 billion, an increase of 1.5 percent from $1.36 billion in fiscal 2009.
Real Intent Delivers Complete Constraint Management Solutions
Real Intent announced today that it is shipping PureTime™ 3.5 with new product features. The PureTime product family facilitates design constraint management and provides users with ultimate confidence in timing constraints employed across all phases of the design implementation flow. The PureTime Constraints solution generates new constraints where needed and verifies that existing constraints are correct, complete, and consistent across all s...
Synopsys - Critical Milestone in 20-nm Design Enablement Collaboration With Samsung Electronics
Synopsys announced that its design enablement collaboration with Samsung Electronics, Co., Ltd., a global leader in advanced semiconductor solutions, has achieved a critical milestone with the successful tapeout of the first 20-nanometer (nm) test chip based on Samsung's High-k metal gate (HKMG) process technology. The test chip was implemented using Synopsys' Galaxy™ Implementation Platform, including the Design Compiler® synthesis, IC Compil...
Synopsys - Galaxy Constraint Analyzer improves designer productivity
Synopsys has introduced Galaxy Constraint Analyzer, a new tool which improves designer productivity through look-ahead constraint analysis technology tuned for the Synopsys Galaxy Implementation Platform. The Galaxy Constraint Analyzer is an intuitive tool that enables designers to quickly assess the correctness and consistency of timing constraints. Correctness and consistency lead to more efficient runtimes in Synopsys’ Design Compiler synthe...
Synopsys CustomSim Selected by GSI Technology for High-Speed SRAM Simulation
Synopsys announced that GSI Technology, a leader in high-density, high-speed monolithic SRAMs, has selected Synopsys' CustomSim FastSPICE solution for the development and verification of its leading-edge designs. GSI Technology's 144-megabit (Mbit) SigmaQuad SRAMs achieve data bandwidths in excess of 72 gigabits per second (Gbps). In order to maximize yield with such aggressive timing specifications, extensive full-chip transistor-level simulati...
Synopsys Enhances Synplify FPGA Synthesis Software With up to 4X Faster Runtime and New Team-Design Capabilities
Synopsys announced the availability of enhancements to its Synplify Pro® and Synplify® Premier FPGA synthesis tools. The new features in the 2010.09 release shorten logic synthesis runtimes and enable faster post-netlist incremental design turns. Comprehensive support for Synopsys DesignWare® Library datapath and building blocks components enables the use of common RTL from prototype to production. In addition, a unique team-design interface a...
austriamicrosystems adopts Nangate’s Library Creator for digital cell library IP development
Nangate, the leading supplier of digital cell library development and design optimization solutions, and austriamicrosystems announced that austriamicrosystems has successfully implemented the Nangate Library Creator Platform to improve the productivity and cost effectiveness of its digital cell library intellectual property (IP) development. austriamicrosystems is a leading global designer and manufacturer of high-performance analog ICs and foc...
austriamicrosystems expands reliance on Cadence technology to achieve seamless mixed-signal SoC design
Cadence Design Systems Inc announced that austriamicrosystems, a leading global designer and manufacturer of high-performance analog ICs for communications, industrial, medical and automotive applications and foundry services, has broadened its deployment of Cadence technology. Over the last two decades, austriamicrosystems has relied on the Cadence Virtuoso custom IC design platform for its analog and mixed-signal designs and process design kits...
CST Announces Joint Marketing Agreement with Cadence Design Systems
As world leaders in their respective fields of layout and 3D full wave simulation, Cadence and CST are collaborating in order to offer an effective workflow for PCB and package layout co-design in high-speed and mixed RF systems. Cadence and CST applications teams will be working together to address customer requirements and offering best in class solutions.