Search results for "EDA"

Agilent Technologies Inc. today announced that its 89600B vector signal analysis software is now able to test 802.11ac signals. This is the first dedicated 802.11ac signal analysis solution on the market.

Backend verification specialist edXact SA today announced that it is a major contributor in the joined development and innovative business model project, dubbed CILOE, led by Minalogic to help SMEs to develop massively parallel and optimized versions of their software on threaded processors and computing farms.

Atmel has announced a new radiation-hardened SPARC processor for space applications, the AT697 Revision F delivering 90 MIPs at 100 MHz over full temperature and voltage ranges for only 0.7W. With more than 1600 flight models of its predecessor, the TSC695E, sold around the world, Atmel has an unrivalled flight heritage on this SPARC V7 processor version.

Dassault Systèmes announced today the launch of a new integration with Synopsys, a world leader in electronic design automation (EDA). The ENOVIA DesignSync for Synopsys’ Galaxy Custom Designer mixed-signal implementation solution integrates the powerful design data management (DDM) capabilities of both ENOVIA DesignSync Data Manager and ENOVIA DesignSync Central within the Synopsys Custom Designer environment. Combined with the existing Des...

Synopsys, Inc. today unveiled its initiative to accelerate the design of stacked multiple-die silicon systems using 3D-IC integration to meet the requirements of faster and smaller electronic products that consume less power. As part of its 3D-IC initiative, Synopsys is working closely with leading IC design and manufacturing companies to deliver a comprehensive EDA solution, including enhanced versions of its IC implementation and circuit simula...

Synopsys, Inc. today announced the open source availability of its widely used Interconnect Technology Format (ITF) for parasitic modeling and the formation of a technical advisory board (TAB) under the auspices of IEEE Industry Standards and Technology Organization (IEEE-ISTO). The purpose of the Interconnect Modeling TAB (IMTAB) is to facilitate the evolution of ITF and promote an interoperable interconnect modeling format to address the indust...

Synopsys announced it has received the Corporate Award from the IEEE Standards Association (IEEE-SA) for its contribution to semiconductor and Electronic Design Automation (EDA) standards and its role in fostering innovation and collaboration in the standards community. The award is presented annually to an IEEE-SA member who demonstrates outstanding leadership and contributions to the organization.

Synopsys announced today that Shrenik Mehta has been awarded Synopsys' eleventh annual Tenzing Norgay Interoperability Achievement Award. As chairperson of Accellera, a leading standards organization in electronic design automation (EDA), from 2005 until 2010, Shrenik guided the organization to several collaborative initiatives that created widely-used standards such as SystemVerilog, Unified Power Format (UPF), and Universal Verification Methodo...

Synopsys today reported results for its fourth quarter and fiscal year 2010. For the fourth quarter of fiscal 2010, Synopsys reported revenue of $375.5 million, compared to $338.3 million for the fourth quarter of fiscal 2009. Revenue for fiscal year 2010 was $1.38 billion, an increase of 1.5 percent from $1.36 billion in fiscal 2009.

Real Intent announced today that it is shipping PureTime™ 3.5 with new product features. The PureTime product family facilitates design constraint management and provides users with ultimate confidence in timing constraints employed across all phases of the design implementation flow. The PureTime Constraints solution generates new constraints where needed and verifies that existing constraints are correct, complete, and consistent across all s...