Search results for "EDA"
ARM And TSMC Sign Long-Term Strategic Agreement
ARM and Taiwan Semiconductor Manufacturing Company, Ltd. (TWSE: 2330, NYSE: TSM) today jointly announced a long-term agreement that provides TSMC with access to a broad range of ARM processors and enables the development of ARM physical IP across TSMC technology nodes. This agreement supports the companies’ mutual customers to achieve optimized Systems-On-Chip (SoC) based on ARM processors and covers a wide range of process nodes extending dow...
ARM and Synopsys Sign Multi-Year EDA Tools and ARM Cortex-A15 Access Agreements
ARM and Synopsys have signed an expanded multi-year agreement extending ARM's access to Synopsys' innovative EDA technology. ARM will also provide Synopsys with access to the ARM Cortex-A15 processor to maximize performance and energy efficiency of SoCs built by ARM's Partners using this advanced ARM processor and Synopsys tools. Both agreements build upon a long history of partnership between the two companies, including ARM's use of Synopsys E...
Synopsys' StarRC Extraction Solution Certified by UMC for 28-nm Designs
Synopsys, Inc. today announced that UMC has certified Synopsys' StarRC parasitic extraction solution for its latest 28-nanometer (nm) process technologies. The StarRC solution delivered silicon-validated accuracy on UMC's evaluation designs to meet the qualification criteria for its advanced 28-nm Poly SiON and High K/Metal gate processes. The StarRC technology files are immediately available to UMC customers working with its 28-nm processes.
Synopsys chosen as primary EDA partner by Hisilicon
Synopsys has announced that Hisilicon Technologies Co., Ltd., a worldwide provider of ASICs and solutions for communication network and digital media, and a subsidiary of Huawei Technologies, has established Synopsys as its primary EDA partner across its implementation and verification design flows. Hisilicon has signed an expanded business agreement to extend its use of Synopsys' IC Compiler place-and-route technology and DesignWare(R) IP as wel...
Synopsys Honors Accellera Systems Initiative with 2012 Tenzing Norgay Interoperability Achievement Award
Synopsys, Inc. announced that Accellera Systems Initiative will receive Synopsys' twelfth annual Tenzing Norgay Interoperability Achievement Award for advancing industry standards that enable interoperable system design flows. The Accellera Systems Initiative was formed in December 2011 through the merger of Open SystemC Initiative and Accellera.
Synopsys Galaxy Implementation Platform Used by TSMC for 28nm Process
Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that TSMC has successfully taped out a complex 28-nanometer (nm) Product Qualification Vehicle (PQV) test chip using Synopsys' Galaxy™ Implementation Platform. Key features used to design the PQV test chip include 28-nm design rule support for place-and-route, interconnect process modeling, IEEE 1801-2009 (U...
Synopsys to Acquire Magma Design Automation
Synopsys has signed a definitive agreement to acquire Magma Design Automation Inc. a provider of chip design software headquartered in San Jose, California. Bringing together complementary technology, development and support capabilities will enable the combined company to more rapidly meet customer requirements linked to chip designs at both leading-edge and mature process nodes.
Synopsys Hosts Special Events with Industry Leaders at DAC 2012
Synopsys, Inc. will host several special events at the Design Automation Conference, June 3 - 7 in San Francisco, California. The events will feature speakers from leading semiconductor companies, IP providers, foundries and Synopsys.
Computer Simulation Technology (CST) announces closer cooperation and webcast with Cadence Design Systems, Inc.
To address increasing customer demand for integrated layout and 3D full wave analysis, CST and Cadence are collaborating to provide a best in class solution. A webcast on June 23 will demonstrate the integration.
Imec and Atrenta Develop Exploration Flows for 3D ICs
Atrenta Inc., a leading provider of SoC Realization solutions for the semiconductor and electronic systems industries, in collaboration with imec’s 3D integration IIAP (industrial affiliation program), have jointly developed an advanced planning and partitioning design flow for heterogeneous 3D stacked ICs. Imec and Atrenta will be demonstrating this flow at the Design Automation Conference (DAC) in San Diego, CA from June 6 – 8, 2011.