Search results for "EDA"
Infiniscale adds to presence in Europe
Infiniscale SA has announced the extension of its sales representation to cover Germany, Austria, Spain and Portugal. The move is part of the company’s worldwide expansion strategy, and strengthens Infiniscale’s sales presence in Europe, a key region for analog and mixed-signals markets.
Arm Claims Industry's Broadest 40nm G Physical IP Platform
ARM has announced the availability of the industry’s most comprehensive IP platform for TSMC’s 40nm G manufacturing process. This latest silicon- validated physical IP from ARM enables cost-effective development of performance driven consumer devices requiring advanced functionality without increasing power consumption. Created for developers looking to advance their designs using the 40nm process, the platform enables higher levels of techn...
Arm AMBA 4 Specification Maximizes Performance And Power Efficiency
ARM announced availability of phase one of the new AMBA 4 specification, providing increased functionality and efficiency for complex, media-rich on-chip communication.
Verigy - Zero-Footprint Tester for Cost-Sensitive ICs and Microcontrollers
Verigy has introduced the V101, a low-cost, zero-footprint, 100 MHz tester-on-board system for wafer sort and final test of today’s most cost-sensitive ICs and microcontrollers. The V101 addresses the extreme low cost requirements of these devices and intense time-to-market pressures.
Yamaha tapes out its latest Graphics LSI Chip with Synopsys Design Compiler Graphical
Synopsys announced that Yamaha, a leading provider of mobile audio and Graphics LSI chip products, achieved their aggressive performance targets ahead of schedule with Design Compiler(R) Graphical and successfully taped out their latest Graphics LSI chip.
Synopsys introduces IC Compiler In-Design Rail Analysis to accelerate design closure
Synopsys has introduced its In-Design Rail Analysis capability to accelerate design closure. Part of Synopsys’ IC Compiler in-design ecosystem, In-Design Rail Analysis utilises embedded PrimeRail analysis and fixing guidance technology to enable designers to easily perform power network verification throughout physical implementation. By identifying and fixing voltage-drop and electromigration issues earlier in the flow, designers can eliminate...
Achronix selects Synopsys as its leading EDA partner
Synopsys has announced that Achronix Semiconductor Corporation, maker of ultra-fast field-programmable gate arrays (FPGAs), has signed an expanded business agreement to establish Synopsys as its leading EDA partner for the design of its next generation FPGAs. As a result of the new multi-year agreement, Achronix has consolidated on Synopsys’ Galaxy Implementation and Discovery Verification Platforms throughout its internal development and desig...
Himax Standardizes on Synopsys Implementation, Verification and IP Solutions for Video SoC Products
Synopsys announced that Himax Technologies, Inc., a leading provider of advanced semiconductors for flat panel displays, has selected Synopsys' Galaxy™ Implementation and Discovery™ Verification Platforms for its video system-on-chip (SoC) products. As part of an expanded business agreement to establish Synopsys as its primary EDA partner, Himax has also extended its use of Synopsys DesignWare® IP.
Synopsys Expands EDA's Largest Users Group to Include Conferences in Ottawa and Austin
Synopsys recently expanded the SNUG program to include events in Ottawa and Austin, making the conferences more accessible and relevant to a greater number of its customers. Bringing SNUG to the backyards of additional customers underscores the value that Synopsys sees in these popular gatherings, and the strong attendance numbers and enthusiastic participation confirm that users also find value in participating in these live events, says Al Czam...
Synopsys Collaborates with Industry Consortium on Solutions to Model Latest 28-nm Parasitic Effects
Synopsys announced new extensions to its open source-licensed Interconnect Technology Format (ITF) which enables modeling of more complex device structures and interconnect layers for parasitic extraction tools at 28-nanometer (nm) and below process technologies. Synopsys collaborated with the members of the Interconnect Modeling Technical Advisory Board (IMTAB) of the IEEE Industry Standards and Technology Organization (IEEE-ISTO) to define th...