Search results for "TSMC"

Synopsys, Inc. today announced that it collaborated with Altera and TSMC to silicon-validate modeling of key parasitic effects in Synopsys' StarRC solution for TSMC's 28-nanometer (nm) processes. The StarRC solution achieved the stringent model-to-silicon accuracy criteria of TSMC's 28-nm process technology to enable high-performance designs at the advanced node. Altera Corporation has successfully deployed StarRC to achieve signoff accurate extr...

iPDKsSynopsys has announced that Synopsys and TSMC have entered into a comprehensive multi-year agreement to jointly develop, validate, support and distribute interoperable process design kits (iPDKs) that are optimised for TSMC advanced semiconductor processes including the 65nm, 40nm and 28nm nodes. The agreement is the culmination of a two year collaboration to establish an interoperable PDK ecosystem that can accelerate and broaden designer a...

Synopsys, announced that it received TSMC's inaugural Interface IP Partner of the Year Award. The award recognizes Synopsys' superior performance in the TSMC IP Alliance. Synopsys was selected based on customer feedback, TSMC-9000 compliance, technical support excellence and customer IP usage. Synopsys' DesignWare interface IP portfolio consists of widely used protocols such as USB, DDR, PCI Express®, HDMI, MIPI, SATA and Ethernet.

Synopsys, Inc. has announced that industry leaders worldwide have broadly deployed and successfully taped out more than 125 advanced multi-voltage designs using the Galaxy™ Implementation Platform low power solution and IEEE-1801 Unified Power Format (UPF) resulting in significant productivity, power and chip performance gains.

Unified Solution Streamlines Development of Embedded Temperature Sensor IP for 65nm, 40nm and 28nm Geometries. Synopsys, Inc. (Nasdaq: SNPS), a world leader in software and IP for semiconductor design, verification and manufacturing, today announced that Moortec Semiconductor Ltd., a mixed-signal IP and semiconductor integrated circuit (IC) provider, has taped out its high-performance analog IP on TSMC's 40LP and 28HP processes using Synopsys' cu...

Synopsys has announced that TSMC has adopted Synopsys’ HSIM hierarchical FastSPICE circuit simulator for its sub-40nm memory intellectual property (IP) characterisation flow. The HSIM simulator will be deployed for TSMC advanced SRAM compilers for timing, power simulation, dynamic IR drop and EM analysis, as well as for full-chip simulation with extracted package models. Using the latest version of the HSIM tool, TSMC is able to improve memory ...

Synopsys has announced that TSMC selected Synopsys’ Galaxy Implementation Platform for its new Integrated Sign-Off Flow. The RTL-to-GDSII design flow deploys the advanced optimisation technologies of Synopsys’ Design Compiler synthesis and IC Compiler physical implementation solutions, and the PrimeTime sign-off and Star-RCXT extraction solutions—the industry yardsticks for IC design sign-off. The new flow is now available for 65nm designs ...

Xilinx released ISE Design Suite 13.2, providing support for the 28nm 7 series families including the recently arrived Virtex-7 VX485T device being demonstrated to customers.

Magma Design Automation today announced TSMC has included the QCP extractor in TSMC’s quarterly EDA qualification report for 28-nanometer (nm) integrated circuits (ICs). This qualification gives designers additional confidence in using QCP to address the increasing complexity of ICs implemented in TSMC’s 28-nm processes.

Magma Design Automation today launched Quartz iPOP, the “improved Productivity, Operability and Performance” initiative to facilitate designers’ adoption of the Quartz™ DRC and Quartz LVS software for designs targeted at 65 nanometers (nm) and below. Magma’s Quartz products, the first truly scalable physical verification solutions, handle larger designs and provide turnaround time up to an order of magnitude faster than traditional sol...