Search results for "Synopsys"

A place-and-route solution, developed by Synopsys, has enabled Toshiba to accelerate tapeout of an advanced 40nm SoC. The outstanding speed-up and QoR delivered by IC Compiler II enabled Toshiba to achieve higher designer productivity and better device performance. Driven by this tapeout success, Toshiba has commenced the rollout of its IC Compiler II-based design kit throughout their design teams.

Synopsys has announced the availability of its VDK for Freescale's S32V200 family of MCUs. The VDK uses the S32V234 virtual prototype as an embedded target for early and more efficient software development, integration and test of ADAS.

Synopsys and Hillcrest Labs have announced that Hillcrest's Freespace MotionEngine software is now optimised to run on Synopsys' DesignWare Sensor and Control IP Subsystem. Hillcrest's MotionEngine software transforms sensor data into high quality, contextual information that powers sensor-enabled features on a wide range of devices.

Synopsys and Sensory have announced the availability of an optimised port of Sensory's TrulyHandsfree voice control software for the Synopsys DesignWare ARC EM DSP processor family. In typical 28nm process technologies, the ARC EM5D processor consumes less than 1μW of power executing TrulyHandsfree low-power sound detection software, and less than 40μW operating in speech recognition mode. The combination of Sensory's highly optimised voice...

Synopsys has announced theDesignWare DDR Explorerperformance analysis tool, which enables designers to quickly optimise Synopsys' DesignWare Enhanced Universal DDR Memory Controller (uMCTL2) for performance, power and cost. Using DDR Explorer, designers can analyse their DDR memory subsystem and optimise their architecture to increase efficiency by up to 20%, while achieving 10 times faster turnaround time compared to RTL analysis.

The Virtualizer Dev Kit (VDK), developed by Synopsys, now supports Ethernet AVB and CAN-FD automotive network peripherals. Designed for Renesas' RH850 MCU family, the VDK is a software development kit that uses RH850 virtual prototypes as a target with software debug and analysis tools.

Synopsys has announced that its collaboration with ARM to bring the power of 10X throughput of IC Compiler II place-and-route solution is enabling superior implementation of high-frequency, power-efficient designs by delivering a reference implementation flow for the ARM Cortex-A72 processor. The combination of RTL synthesis and place-and-route solutions with a reference implementation flow optimised for the CPU is already enabling engineers to d...

A verification IP (VIP) for the 25G/50G Ethernet specification, developed by the 25 Gigabit Ethernet Consortium, is now available from Synopsys. Based on native SystemVerilog Universal Verification Methodology (UVM) architecture, the VIP enables easy use, easy integration and improved performance.

A medium density NVM IP family, which fills the gap between lower bit count NVM and flash memory, without requiring additional masks or processing steps, has been released by Synopsys. The DesignWare medium density NVM IP family provides up to 64 Kb of on-chip memory and eliminates the need for external EEPROM or flash memory when integrating MCUs in analogue IC designs for smart sensors, power management and touchscreen controller applications. ...

Lattice Semiconductor has introduced a functional safety design flow solution which enables users to simplify and speed up the IEC61508 safety certification process for safety-critical applications using Lattice FPGAs. Certified by TÜV-Rheinland, the solution enables engineers to adhere to latest safety design methodology, save time and reduce costs.