Search results for "EDA"

Synopsys today announced 20-nanometer (nm) process technology support for the TSMC 20nm Reference flow. This includes Synopsys Galaxy Implementation Platform support for the latest TSMC 20nm design rules and models.

Mentor Graphics today announced new capabilities to complement TSMC's 20nm manufacturing processes. Enhancements to support both digital and analog/mixed signal 20nm reference flows include new features in the PyxisT IC Station platform, the Eldo fast SPICE simulation products, the Olympus-SoCT place and route system, the CalibreR nmDRCT, Calibre RealTime, Calibre PERCT and Calibre xACT 3D solutions, and the TessentR silicon test product suite.

Synopsys today announced that it is delivering a comprehensive 3D-IC design solution that is included in TSMC's CoWoS (Chip on Wafer on Substrate) Reference Flow. The design flow is the result of the latest collaboration between the companies on 3D-IC integration technologies.

The Interoperable PDK Libraries Alliance announced today that Solido Design Automation has joined the IPL Alliance, a standards organization whose charter is to establish an interoperable custom design ecosystem. Solido Design Automation plans to support IPL's Interoperable Analog Design Constraint Standard 1.1.

Zuken has announced support for Xilinx’s Zynq-7000 All Programmable SoCs within its CR-8000 and CR-5000 PCB design suites.

Agilent have today announced that STMicroelectronics has selected Agilent’s Electromagnetic Professional software for use in development of ESD structures based on advanced CMOS process technology.

Zuken has today announced that it has enhanced integration between Zuken’s Board Designer solution and Agilent's Advanced Design System software. The improved integration between the tools creates a number of benefits, including allowing engineers to easily import net, component and pin names created in Board Designer into ADS, along with other geometries.

Edac has added to its range of D-Subminiature products with an ultra-slim, 15 circuit, high-density, R/A, VGA connector. The insulator thickness, behind the front shell, is just 4.7mm.

EDA Solutions, exclusive European representative for analogue and mixed-signal tool vendor Tanner EDA, has introduced a 14-day service for custom design kits so that users of the company’s chip layout tools can take advantage of the new 0.25, 0.18 and 0.15 micron processes that have become available since X-FAB’s recent merger with 1st Silicon, Malaysia's premier 200mm wafer foundry.

Tanner EDA is to add Tiburon Design Automation’s Verilog-A module to its T-Spice simulation tool for analogue design, creating a new package that will be called HiPer Simulation. The Verilog-A module, which is fully compatible with the Verilog-AMS Language Reference Manual Version 2.2, enables designers to develop analogue models for components or complete circuits blocks over 10 times faster than creating C-based models.