Search results for "Synopsys"

Synopsys has announced it has signed a definitive agreement to acquire certain assets of Quotium, including the Quotium Seeker product and R&D team. The additional talent, technology and products will expand Synopsys' presence in the application security market by extending the Coverity platform with Interactive Application Security Testing (IAST) functionality.

Synopsys has announced the 2015.06 release of its IC CompilerII place and route solution. Launched last year,IC Compiler IIhas seen steadily increasing customer numbers and levels of design activity across all nodes. Today, with active usage across more than 30 customers, IC Compiler II is rapidly transforming the world of physical design with its game-changing productivity and superior Quality of Results (QoR).

Synopsys has announced TSMC's certification of the IC Compiler II place and route solution on TSMC's 16nm FinFET Plus (16FF+) process. The IC Compiler II is the successor to IC Compiler, the industry's widely adopted place and route solution for advanced designs at both established and emerging nodes.

Synopsys has announced FastSPICE simulation breakthroughs in its CustomSim circuit simulator 2015.06 release that doubles multi-core speed-up on four cores,enabling design teams to keep pace with the increasing complexity of verifying advanced-node and mixed-signal designs. Optimisations in CustomSim deliver double single-core speed-up for designs using BCD (Bipolar-CMOS-DMOS) process technology, such as PMICs.

Synopsys and TSMC are collaborating to develop an integrated IoT platform on TSMC's 40nm ultra low power process technology. The platform incorporates a broad range of DesignWare IP, including an integrated sensor and control IP subsystem with the ultra low power ARC EM5D processor core, power- and area-optimised logic libraries, memory compilers, NVM, MIPI and USB interfaces as well as an ADC.

Synopsys has announced that Toshiba and Nationz, a Chinese chip provider, have both successfully deployed Synopsys' PrimeRail tool as the standard power and rail analysis solution for implementation and signoff. The adoption of PrimeRail dynamic analysis in Nationz' design and signoff methodology enabled engineers to accurately capture peak power and voltage drop violations accounting for transient circuit behaviour.

Synopsys has announced that STMicroelectronics has taped out its latest Fully Depleted Silicon On Insulator (FD-SOI) SoC using Synopsys' IC CompilerII place and route solution.Collaborating closely with Synopsys, ST used the tool to complete more than half of the chip, achieving higher designer productivity and better device performance.

Synopsys has expanded its Virtualizer Development Kit (VDK) portfolio for Renesas' RH850 MCU with a virtual prototype for the RH850/P1x series targeting chassis ECUs. The latest virtual prototype builds upon the existing VDK for Renesas RH850 MCUs, which includes support for the F1x, E1x and C1x series MCUs.

Synopsys has announced the industry's lowest power controller and PHY IP solution for PCI Express 3.1 specification, reducing active and standby power consumption for mobile SoCs. DesignWare IP for PCIe 3.1 incorporates L1 sub-states along with power gating techniques including the use of power switches, power islands or retention cells to reduce standby power to less than 10μW/lane.

Lattice Semiconductor has announced updates to Lattice Diamond, iCEcube2 and ispLEVER Classic design tool suites. This continued investment in design tools re-affirms Lattice’s commitment to providing customers with industry leading low power, small form factor and low cost FPGAs.