Search results for "TSMC"

The 2014 edition of IC Insights’ McClean report provides a ranking of the industry’s 10 largest IC manufacturers in terms of installed capacity. This top 10 list features four companies from North America, two companies from South Korea, two from Taiwan, and one each from Europe and Japan.

Altera introduce the industry's first development tool support for 20 nm FPGAs and SoCs, the Quartus II software Arria 10 edition. Offering the fastest compile times in the industry, the familiar and proven Quartus II design environment can be used by customers to start developing Arria 10 FPGA and SoC-based systems.

Synopsys announce that TSMC awarded Synopsys its Open Innovation Platform "Partner of the Year 2013" for joint development of 16-nanometer FinFET design infrastructure. The award recognizes Synopsys' broad and deep technical expertise and shared commitment to the development and delivery of TSMC's 16-nm Reference Flow, validated on a quad-core ARM Cortex-A15 mobile processor design

Synopsys has collaborated with TSMC to provide support for voltage-dependent design rules in TSMC's 16-nm Custom Design Reference Flow. As part of TSMC's custom design infrastructure, TSMC has also certified Synopsys' Laker custom design solution and circuit simulation tools that deliver new capabilities for TSMC V0.5 16-nm FinFET process layout design rules, device models, and electromigration and IR-drop analysis. TSMC and Synopsys will continu...

Known as Multi-Project Wafer (MPW) or shuttle run, ams has updated the schedule of the IC prototyping service for 2014. Combining several designs from different customers onto a single wafer, the prototyping service offers significant cost advantages for foundry customers as the costs for wafers and masks are shared among a number of different shuttle participants.

Dolphin Integration announces the SESAME BIV standard cell library as a major innovation for ultra low leakage always-on logic block. SESAME BIV standard cell library extends the RCSL offer by delivering a leakage reduction of 1/350 for a silicon footprint up to 7x denser for a 5,000-gate block implemented with a usual HVT standard cell combined with its dedicated low quiescent linear regulator.

Cadence Design Systems, Inc today received three TSMC Partner of the Year Awards during TSMC’s Open Innovation Platform forum – accepting the most awards from the event. Cadence was presented awards for three different categories including awards for analog/mixed signal IP, 16nm FinFET design infrastructure, and 3D-IC design solutions. The awards underscore the deep collaboration between the two companies in bringing the highest quali...

Altera has today announced the introduction of five new low-cost development kits based on its Cyclone V FPGAs. These new kits make it easy for designers to cost-effectively get started on FPGA development with an entry point of just $49. Altera provides the industry’s broadest portfolio of low-cost solutions that deliver optimal power and performance based on customer’s unique design requirements.

Synopsys announce the availability of a range of DesignWare Interface IP on TSMC's 20-nanometer system-on-chip process. The silicon-proven Synopsys DesignWare USB, DDR, PCI Express and MIPI PHY IP on TSMC's 20SoC process reduces risk for designers who need to implement the latest interface IP standards in their SoCs and want to take advantage of 25 percent lower power consumption or a 30 percent performance improvement offered by TSMC's 20SoC pro...

Semiconductor capital spending has increased significantly among pure-play foundries as more IDMs shift to a fabless/fab-lite business model and as new foundry participants intensify competition among the old guard. The total capital outlays by the Big 4 pure-play foundries are forecast to be $16.6 billion in 2013, which would represent 53% of their combined sales (Figure 1). This far exceeds the industry average of 18% capital-spending-to-sales ...