Search results for "Synopsys"
Collaboration provides Synopsys with access to ARM Fast Models
Synopsys has announced the extension of a multi-year licensing agreement with ARM to provide the latest ARM Fast Models for ARM Cortex processors, including the recently announced ARM Cortex-A35 core, as part of Synopsys Virtualiser Development Kits. Synopsys VDKs are software development kits using virtual prototypes as the embedded target.
PLS’ UDE 4.6 sets new standards in test automation
PLS Programmierbare Logik & Systeme has not only expanded the latest version of its Universal Debug Engine (UDE) with a number of additional trace and debugging functions, but has also added completely new features for test automation.
Ethernet 400G Verification IP for next-gen comms
A new verification IP (VIP) and source code test suite has been introduced by Synopsys to support the proposed IEEE P802.3bs/D1.0 Ethernet 400G standard.
Advanced system-level capabilities in next-gen VC Verification IP
Synopsys announces the availability of advanced system-level capabilities in its next-gen VC Verification IP (VIP) for the ARM AMBA 4 ACE and AMBA 5 CHI protocols, as well as availability of verification IP for the recently announced AMBA 5 AHB5 protocol. The AMBA 4 ACE specifications are used for full coherency between processors and AMBA 5 CHI is an architecture for system scalability in enterprise SoCs.
Delivering a 50% reduction in power
A collaboration between GLOBALFOUNDRIES and Synopses has resulted in a RTL-to-GDSII solution for the industry's first 22-nanometre (nm) fully depleted silicon-on-insulator (FD-SOI) technology process.
Acquisition extends software integrity platform
To expand its presence in the software quality and security market, Synopsys has acquired Canadian software company Protecode, which provides solutions for detecting and managing open source software (OSS) and the associated license and security risks.
Enhanced security package for DesignWare ARC EM processors
Synopsys has announced availability of the Enhanced Security Package, a new licensable option for DesignWare ARC EM Processors. This ARC EM option enables designers to create an isolated, secure environment that protects their systems and software from evolving security threats such as IP theft and remote attacks. The Enhanced Security Package integrates Synopsys SecureShield technology, which provides support for separating secure and non-secure...
Synopsys' IC Compiler II surpasses 100 production designs
Since its introduction in 2014, Synopsys' IC Compiler II place and route system has been successfully deployed on more than 100 production designs, including more than 50 unique customers across 18 different foundry process nodes. This game-changing successor to IC Compiler, the industry's leading place and route solution, has enabled first-pass silicon success on dozens of these production designs ranging from 130 to the latest 10nm process node...
MIPI D-PHY IP operates at 2.5Gb/s per lane on TSMC 16FF+ process
Synopsys has announced the industry's first demonstration of MIPI D-PHY IP on TSMC's 16FF+ (16nm FinFET Plus) process operating at 2.5Gb/s per lane. The demonstration shows the DesignWare D-PHY receiver lane connected to Keysight Technologies' test equipment, which provided burst-mode stimulus for stressed eye testing and the transmitter lane connected to the Keysight oscilloscope displaying the transmitter's performance.
FPGA software tools offer parallel synthesis execution
Featuring multiprocessing technology that accelerates runtime by up to three times compared to the previous-gen and physically-aware advanced synthesis to increase timing quality of results by up to 10%, Synopsys has announced the latest release of the its Synplify Pro and Synplify Premier FPGA synthesis software tools.