Search results for "Synopsys"
Partner Awards bestowed at the Open Innovation Platform Forum
Four ‘2018 Partner of the Year’ awards have been bestowed by TSMC upon Synopsys for Interface IP and joint development of five nanometre (nm) design infrastructure and Virtual Design Environment (VDE) Cloud Solution, plus joint delivery of the Wafer-on-Wafer (WoW) Design Solution.
Automotive-grade IP in seven nanometre process for ADAS designs
The delivery of automotive-grade DesignWare Controller and PHY IP for TSMC's seven nanometer (nm) FinFET process has been announced by Synopsys. The DesignWare LPDDR4x, MIPI CSI-2 and D-PHY, PCI Express 4.0, and security IP implement advanced automotive design rules for TSMC seven nanometre process to meet the stringent reliability and operation requirements of ADAS and autonomous driving system-on-chips (SoCs).
Production-ready flow for advanced customer designs
It has been announced that TSMC has certified the Synopsys Digital and Custom Design Platforms for the latest version of its most advanced, extreme-ultra-violate (EUV)-based, five nanometer (nm) process technology. This certification is the result of an extensive, multi-year collaboration to deliver an optimised design solution that speeds the path to next-generation designs.
Automotive lighting simulations support faster design cycles
The availability of Synopsys' latest releases of the LucidShapeCAA V5 BasedandLucidDrivesoftware products for automotive lighting analysis and simulation has been announced. The products offernew features to support faster design cycles, lower development costs, and enhanced realism of headlight simulations.
Synopsys announces earnings release date for third quarter
Report results for the third quarter fiscal year 2018 will be published by Synopsys on Wednesday, 22nd August 2018, after the market close. A conference call to review the results will begin at 14:00 PT and will be hosted by Aart de Geus, Chairman and Co-Chief Executive Officer, and Trac Pham, Chief Financial Officer.
Accelerating 3nm process development with DTCO innovations
Synopsys has announced a collaboration with IBM to apply design technology co-optimisation (DTCO) to the pathfinding of new semiconductor process technologies for the 3nm process node and beyond. DTCO is a methodology for efficiently evaluating and down-selecting new transistor architectures, materials and other process technology innovations using design metrics, starting with an early pathfinding phase before wafers become available.
Redefining interactive application security testing
The availability of the latest major Seeker release, an interactive application security testing (IAST) solution redesigned to enable DevSecOps and continuous delivery of secure web applications, has been announced by Synopsys.
Comment: Facebook's departing security chief calls for privacy reforms
Facebook's departing head of security, Alex Stamos, wrote a memo amidst the Cambridge Analytica scandal, calling for Facebook to collect less user data, and re-evaluate the site’s approach to privacy. This memo was published yesterday by BuzzFeed News, here.
400G hyperscale data centres with high performance Ethernet IP
It has been recently announced by Synopsys that the new DesignWare 56G Ethernet PHY IP for emerging 400Gbps hyperscale data centre system-on-chips (SoCs) will be available this year. The advanced 56G Ethernet PHY architecture incorporates Synopsys' silicon proven data converters with a configurable transmitter and digital signal processor (DSP) based receiver.
Healthcare data now more valuable than financial information
The healthcare data breach outlines a new reality. In today’s world, we are beginning to see a new and scary fact, healthcare data has grown its value so much that hackers are now willing to go the extra mile to obtain it. Author: Olli Jarva, Managing Consultant at Synopsys' Software Integrity Group