FPGAs

Altera has revealed that its SDK for OpenCL is conformant to the OpenCL 1.0 standard and is now included on the Khronos Group list of OpenCL conformant products. Altera is the only company to offer an FPGA-optimized OpenCL solution, allowing software developers to harness the massively parallel architecture of an FPGA for system acceleration.

Analog Devices has released an FPGA-based reference design with software and HDL code that reduces the design risk of high-speed systems incorporating JESD204B-compatible converters. The JESD204B Xilinx Transceiver Debug Tool supports the 312.5-Mbps to 12.5-Gbps JESD204B data converter-to-FPGA serial data interface and Xilinx 7 series FPGAs and Zynq-7000 All Programmable SoCs.

Microsemi announce availability of the low-cost IGLOO2 FPGA Evaluation Kit, providing customers with a PCI Express compliant form factor evaluation platform. This full feature kit enables designers to quickly evaluate the integration, low power, security, instant-on and high reliability features of Microsemi’s recently announced IGLOO2 FPGAs.

Altera announce production availability of the Cyclone V SoCs and engineering sample availability of its Arria V SoCs. With increased processor peak clock frequencies — Cyclone V SoCs at 925 MHz for commercial-grade and 700 MHz for automotive-grade, and Arria V SoCs at 1.05 GHz for industrial-grade — these devices are the industry’s highest performing SoCs in the FPGA industry.

Lattice Semiconductor introduces the ultra-low density MachXO3 Field Programmable Gate Array family, the world’s smallest, lowest-cost-per I/O programmable platform aimed at expanding system capabilities and bridging emerging connectivity interfaces using both parallel and serial I/O. By matching advanced, small-footprint packaging with on-chip resources, the MachXO3 family puts affordable innovation into the hands of system architects by s...

Altera Corporation and Micron Technology today announced they have jointly demonstrated successful interoperability between Altera Stratix V FPGAs and Micron’s Hybrid Memory Cube. This technology achievement enables system designers to evaluate today the benefits of HMC with FPGAs and SoCs for next-generation communications and high-performance computing designs. The demonstration provides an early proof point that production support of HMC...

Pentek has today announced a new digital I/O module featuring low-voltage differential signalling I/O connected to a Virtex-6 FPGA, the Model 71610. LVDS is a general purpose digital interface operating at very high speeds over inexpensive twisted-pair or flat ribbon copper cables. It is popular for many common control or data capture applications such as high-speed video, graphics, video camera data transfers and general purpose computer buses.

Designers can now reduce power, size and system cost for programmable logic controller digital-input subsystems, with the Corona (MAXREFDES12#) reference design from Maxim. One method of reducing the size of I/O solutions in PLCs is to reduce the number of digital channels that need to be isolated. Integrating three Maxim products including the MAX13256 transformer driver, the Corona design reduces isolated channels and eliminates the need f...

Lattice Semiconductor has introducedan easy-to-use USB thumb drive form factor development board, theiCEstick Evaluation Kit. The new Lattice FPGA evaluation kit allows engineers and system architects to rapidly evaluate and develop mobile solutions based on the Lattice’s iCE40 mobileFPGA family, the world’s first and only FPGAs built to address the mobile devices market.

Synopsys and Lattice Semiconductor reveal a multi-year extension of their OEM agreement for Synopsys' Synplify FPGA synthesis tools optimized for Lattice FPGAs and Complex Programmable Logic Devices. Under this continued agreement, Synopsys remains the exclusive independent provider of FPGA logic synthesis technology for designers targeting Lattice FPGA and CPLD products.