FPGAs

The latest latest soft IP Core, the DHDLC, has been announced by Digital Core Design. Designed to control HDLC/SDLC transmission frame and optimized for great variety of 8, 16 and 32-bit MCUs, the DHDLC is a technology independent design and can therefore can be implemented in both ASIC and FPGA.

Microsemi has today revealed that PCI Express 2.0 endpoint specification certification has been granted to its SmartFusion2 SoC FPGAs and IGLOO2 FPGAs. Newly included on the PCI SIG Integrators List, the newly certified devices have been tested and found to provide a reduction of up to ten times static power consumption compared to other comparable PLCs, making them the industry's lowest power PCIe 2.0 programmable logic solutions.

Based on the Digital Control Architecture from Powervation, the first in a series of PoL non-isolated DC-DC converters has been announced today by Murata. Designed to address the industry’s growing requirement for low voltages and fast transient respnse times, the DOSA compatible OKLF 25A PoL is ideal for powering the latest FPGAs and ASICs used in networking, telecommunications and computing applications.

BittWare has expanded its Open Computing Language support to additional Stratix V variants on their S5PH-Q PCI Express board. FPGA options now include GSMD5, GSED8, GXEA7 and GXEAB devices. Offering up to 16 GBytes of on-board DDR3 memory at 800MHz (1600 Mtps), S5PH-Q is a half-length PCIe x8 card. Two front-panel QSFP+ cages on the board allow implementation of two 40GigE (or eight 10GigE) interfaces direct to the FPGA for reduced latency.

Altera have revealed that the newest release of its SDK for OpenCL now supports IBM Power Systems servers as an OpenCL system host. Users can now develop OpenCL code targetting IBM Power Systems CPUs and accelerator boards with Altera FPGAs as a high-performance compute solution. Compared to standard CPU based servers, FPGA users can see a five to twenty times performance increase for many applications.

Microsemi introduces an advanced security IP block which provides additional layers of user-configurable tamper protection and responses to Microsemi's SmartFusion2 SoC FPGAs and IGLOO2 FPGAs. The EnforcIT Security Monitor enables users to easily configure SmartFusion2 and IGLOO2 devices to interface with hardware security mechanisms built into the silicon of these FPGAs.

Altera has introduced version 13.1 of its Quartus II FPGA design software. As a result of significant algorithm optimization and increased parallelization, the new software offers an average of 30% and a maximum of 70% reduction in compile times compared to the previous version. Delivering enhancements to high-level design tools, Quartus II version 13.1 enables customers tomaximize productivity and benefit from the leading-edge capabilities of Al...

BPM Microsystems and Lattice have worked together to develop and qualify proactive support for the iCE40 family, with BPM Microsystems today confirming that their 7th and 8th Generation platforms now support the iCE40 family of FPGAs from Lattice Semiconductor Corporation.

Delivering the world’s most flexible, single-chip sensor solutions for a new generation of context-aware, ultra-low power mobile devices, the new ultra-low-density iCE40 FPGAs have been announced by Lattice. Allowing customers to integrate more functions into a smaller space, the new iCE40 FPGAs are small enough and affordable enough to fit almost anywhere, reducing board space and system complexity.

Altera reveal four new reference designs that leverage the power technology obtained through its recent acquisition of Enpirion. The reference designs provide turnkey power solutions which increase power efficiency by up to 35 percent, reduce board area by up to 50 percent, and reduce overall BOM bulk capacitance costs by up to 50 percent versus competing power solutions for FPGA users and board developers.