Synopsys, Inc. today announced that GLOBALFOUNDRIES has selected Synopsys' Yield Explorer solution as part of their next-phase Yield Management System for faster yield ramp based on volume diagnostics. Rapid identification and correction of systematic failure mechanisms is critical to bringing a new technology node to production and driving the yield ramp on new integrated circuit designs.

Synopsys, Inc. announced that Chairman of the Board and CEO Aart de Geus and President and COO Chi-Foon Chan will become co-CEOs, effective immediately. Appointing Dr. Chan as co-CEO formally recognizes the contributions he has made in co-leading Synopsys for more than 10 years. Drs. de Geus and Chan will continue to share responsibility for managing the company, and the organizational structure and responsibilities will remain the same.

Synopsys, Inc. today announced that John Chilton, senior vice president of marketing and corporate development, will speak at the 40th Annual Cowen Technology, Media & Telecom Conference in New York, on May 31, 2012.

Synopsys, Inc. announced that Accellera Systems Initiative will receive Synopsys' twelfth annual Tenzing Norgay Interoperability Achievement Award for advancing industry standards that enable interoperable system design flows. The Accellera Systems Initiative was formed in December 2011 through the merger of Open SystemC Initiative and Accellera.

Synopsys, Inc. will host several special events at the Design Automation Conference, June 3 - 7 in San Francisco, California. The events will feature speakers from leading semiconductor companies, IP providers, foundries and Synopsys.

Synopsys, Inc. today reported results for its second quarter of fiscal year 2012. For the second quarter of fiscal year 2012, Synopsys reported revenue of $432.6 million, compared to $393.7 million for the second quarter of fiscal 2011, an increase of 10 percent.

Synopsys, Inc. today announced it will report results for the second quarter of fiscal year 2012 on Wednesday, May 23, 2012, after the market close.

Synopsys, Inc. today announced it has completed the acquisition of privately held RSoft Design Group, Inc. (RSoft). The combination of Synopsys' imaging and illumination design products with RSoft's photonics design products extends Synopsys' platform to provide a more complete set of optical solutions to current customers, as well as to support new technologies, applications and markets as they emerge.

Synopsys, Inc. today announced the successful collaboration between Synopsys and Samsung Electronics on the implementation of an ARM Cortex-A15 MPCore processor. The processor core was implemented by Samsung Austin Research Center (SARC) using Synopsys IC Compiler place-and-route technology, a cornerstone of the Synopsys Galaxy Implementation Platform.

Synopsys, Inc. today announced the release of a new Deep Trace Debug feature for users of its HAPS FPGA-based prototyping systems. With HAPS Deep Trace Debug, prototypers can take advantage of approximately 100 times more signal storage capacity than the traditional memory storage employed by on-chip FPGA logic debuggers.

Synopsys, Inc. today announced the production qualification and adoption of Synopsys' Proteus LRC at Renesas Electronics Corporation, the world's premier supplier of microcontrollers and a world's leading supplier of advanced semiconductor system solutions including microcontrollers, SoC solutions and a broad-range of analog and power devices. Proteus LRC provides large-scale integrated circuit (LSI) manufacturers like Renesas with a highly accur...

Synopsys, Inc. today announced that UMC has certified Synopsys' StarRC parasitic extraction solution for its latest 28-nanometer (nm) process technologies. The StarRC solution delivered silicon-validated accuracy on UMC's evaluation designs to meet the qualification criteria for its advanced 28-nm Poly SiON and High K/Metal gate processes. The StarRC technology files are immediately available to UMC customers working with its 28-nm processes.

Synopsys, Inc. today announced that it collaborated with Altera and TSMC to silicon-validate modeling of key parasitic effects in Synopsys' StarRC solution for TSMC's 28-nanometer (nm) processes. The StarRC solution achieved the stringent model-to-silicon accuracy criteria of TSMC's 28-nm process technology to enable high-performance designs at the advanced node. Altera Corporation has successfully deployed StarRC to achieve signoff accurate extr...

Synopsys, Inc. today announced that its StarRC parasitic extraction solution has enabled more than 150 successful 28-nanometer (nm) tapeouts, delivering fast turnaround time and the signoff accuracy required for next-generation designs across computer, consumer, mobile and wireless communications applications. StarRC's advanced modeling of complex process effects at the 28-nm silicon process technology node and its leading qualification by major ...

Synopsys, Inc. today unveiled its initiative to accelerate the design of stacked multiple-die silicon systems using 3D-IC integration to meet the requirements of faster and smaller electronic products that consume less power. As part of its 3D-IC initiative, Synopsys is working closely with leading IC design and manufacturing companies to deliver a comprehensive EDA solution, including enhanced versions of its IC implementation and circuit simula...

Synopsys, Inc. today announced availability of verification IP (VIP) for Non-Volatile Memory Express (NVMe), an emerging storage protocol for connecting solid state drives (SSDs) directly to the PCI Express interface. With the addition of the NVM Express protocol to its leading serial ATA (SATA) and serial attached SCSI (SAS) verification IP, Synopsys expands its portfolio and leadership in verification IP for storage protocols.

Synopsys, Inc. today announced the first release of the Virtualizer Development Kit (VDK) Family for accelerating software development. The VDK Family for ARM Cortex Processors contains multiple reference designs, analysis and debug software tools for the Cortex-A15 MPCore processor and ARM big.LITTLE processing. By using the VDKs developers can now optimize for performance and energy efficiency prior to board availability. The reference designs ...

Synopsys, Inc. and Applied Materials, Inc. today announced a collaboration to develop technology computer-aided design (TCAD) models for next-generation semiconductor devices. The models derived from this TCAD collaboration will enable customers to speed up process development for 14-nanometer (nm) and 11-nm logic and new memory chip technologies, allowing them to lower cost and reduce time-to-market.

Blue Pearl Software, Inc announced that its Blue Pearl Software Suite, for Windows and Linux operating systems, supports Synopsys’ Synplify Pro FPGA synthesis software for VHDL and SystemVerilog designs. Blue Pearl Software Suite’s connection to Synplify Pro software improves interoperability with Synopsys’ leading synthesis flow and makes it easier for FPGA designers to add Blue Pearl Software’s automatic Synopsys Design Constraints (SDC...

Global Unichip Corp. and Synopsys, Inc. today announced the tape out of 30 customer devices during the past four years using a combination of Synopsys' DesignWare IP and GUC's ASIC design services. This milestone marks GUC's emergence as an ASIC industry leader, demonstrates the quality and breadth of Synopsys' IP portfolio and underscores the successful partnership between the two companies.