Synopsys today announced that ST has adopted Synopsys' volume diagnostics solution company-wide for faster yield ramp. IC product teams must rapidly isolate and correct systematic failure mechanisms to ramp up new IC designs from low initial yield to mature yield in volume production.

Synopsys today announced that its next-generation Discovery Verification IP (VIP) for the ARM AMBA 4 AXI4 protocol now offers a Performance Checker capability. This capability enables system-on-chip (SoC) verification teams to analyze and validate SoC performance using metrics established during the system architecture definition process, speeding up the debug of SoC performance bottlenecks.

Synopsys today announced that Synopsys' IC Validator physical verification product has been qualified by United Microelectronics Corporation for 28-nm physical signoff, with immediate availability of design rule checking (DRC) and layout-vs.-schematic (LVS) runsets to UMC customers.

Synopsys, Inc today announced it has joined the Partners for the Advancement of Collaborative Engineering Education (PACE) program. Through the PACE program, Synopsys' Saber product line for the modeling and simulation of power, physical and multi-domain automotive systems will be provided to all 57 PACE institutions worldwide.

Synopsys today announced 20-nanometer (nm) process technology support for the TSMC 20nm Reference flow. This includes Synopsys Galaxy Implementation Platform support for the latest TSMC 20nm design rules and models.

Synopsys today announced that it is delivering a comprehensive 3D-IC design solution that is included in TSMC's CoWoS (Chip on Wafer on Substrate) Reference Flow. The design flow is the result of the latest collaboration between the companies on 3D-IC integration technologies.

Synopsys today announced the availability of Synopsys' CODE V Optical Design Software, version 10.5, which offers new and improved optimization and tolerancing capabilities for the design of high-performance optical systems with reduced sensitivity to manufacturing and alignment errors.

IC Compiler is a cornerstone of the Synopsys Galaxy Implementation Platform, and its advanced optimization technologies, unique leakage power recovery capability and predictable flow with Synopsys Design Compiler Graphical synthesis solution were key contributors to Open-Silicon achieving the performance and power targets and predictable timing closure for the hardened processor core.

Synopsys have unveiled two new products today: the DesignWare MIPI UniPro Controller for host and device storage, camera and display applications, and the DesignWare UFS Host Controller for storage applications. The new IP works in tandem with the multi-gear DesignWare MIPI M-PHY IP to accelerate the implementation of the MIPI Alliance UniPro and UFS interface standards in application processors, mobile systems-on-chips and peripheral ICs.

Synopsys today announced that the Synopsys Silicon Valley Science and Technology Outreach Foundation has reached a major milestone of providing more than one million unique experiences to students and teachers developing science projects since the program's inception in 1999. Experiences include support for science project development, science fair sponsorship, competitions and teacher training offered through a range of Foundation programs.

Synopsys has revealed today that Hitachi has selected Synopsys' Discovery Verification IP for the ARM AMBA AXI3 protocol for verification of Hitachi Virtual Storage Platform. Enabled by Synopsys' next-generation VIPER architecture, Discovery VIP demonstrated a performance advantage over other VIP, as well as delivered protocol-aware debug capabilities and advanced built-in coverage features, which have accelerated Hitachi's Storage Systems verifi...

Synopsys announced today that it has obtained regulatory approval in Taiwan to acquire SpringSoft, Inc. In addition, greater than 51 percent of the outstanding shares of SpringSoft have been tendered. By meeting these two milestones, Synopsys expects to complete the tender offer and take a controlling interest in SpringSoft as of October 1, 2012.

Synopsys has today announced that it has enhanced it DesignWare DDR Memory Interface IP portfolio with the release of support for DDR4 SDRAMs. By supporting DDR4 as well as DDR3 and LPDDR2/3 in a single core, the DesignWare DDR solution enables designers to interface with either high-performance or low-power SDRAMs in the same system-on-chip, which is a key requirement of many SoCs such as applications processors for smartphones and tablets.

Synopsys today announce the release of IC Validator 2012.06, Synopsys' physical verification platform for advanced process nodes. With immediate availability of qualified rule decks by leading foundries, IC Validator 2012.06 offers new technologies that enable physical signoff verification at advanced process nodes.

Synopsys today announce the availability of the latest release of its RSoft Optical Communication Design Suite, which includes OptSim and its multimode companion tool ModeSYS. OptSim version 5.3 delivers innovative modeling capabilities and new application examples that enable engineers to accelerate the design of high-performance optical communication systems.

Synopsys has today announced that John Chilton, senior vice president of marketing and corporate development, will speak at Deutsche Bank's dbAccess 2012 Technology Conference in Las Vegas, on Sept. 11, 2012.

Synopsys has today revealed the 100th design win of its DesignWare IP optimized for 28-nm processes for multiple leading foundries. The silicon-proven 28-nm portfolio consists of widely-used IP including PHYs for USB, PCI Express, SATA, HDMI, DDR, MIPI, as well as data converters, audio codecs, embedded memories and logic libraries, with tens of millions of units shipped.

Synopsys has today revealed results for its third quarter of fiscal year 2012. For the third quarter of fiscal year 2012, Synopsys reported revenue of $443.7 million, compared to $386.8 million for the third quarter of fiscal year 2011, an increase of 14.8 percent.

Synopsys today revealed that University of Rochester students Anthony Visconti and Brett Sternfield and University of Alabama in Huntsville student Josh Walters are the winners of the 2012 Robert S. Hilbert Memorial Optical Design Competition.

Synopsys has annoucned today that it will report results for the third quarter of fiscal year 2012 on Wednesday, Aug. 22, 2012, after the market close. A conference call to review the results will begin at 2:00 p.m. PT (5:00 p.m. ET) and will be hosted by Aart de Geus, chairman and co-chief executive officer, and Brian Beattie, chief financial officer.