Imec presents 4K2K CMOS image sensor together with Panasonic

18th June 2013

IMEC

ES Admin

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Imec presents a CMOS image sensor capable of capturing 12-bit 4,000x2,000pixel progressive images at 60 frames per second. Based on a stagger-laced dual exposure, the image sensor developed with Panasonic, was processed using imec’s 130nm CMOS process on 200mm silicon wafers to deliver high-speed and high-quality imaging, at reduced output bit rate.

The number of pixels on image sensors in video and still cameras keeps increasing, along with the frame rate and bit resolution requirements of the images. 4K2K will be the next-generation broadcasting format, offering an increase by a factor of two in both horizontal and vertical resolution compared to current state-of-the-art High Definition TV.

The image sensor chip is a floating diffusion shared 4T pixel imager, with a pitch of 2.5 micron and a conversion gain of 70 μV/e-, which allows for both a classical rolling shutter or stagger-laced scanning mode. The 4K2K 60-fps imaging performance is realized by 12-bit column-based delta-sigma A/D converters. The stagger-laced scanning method improves imaging sensitivity and realizes a 50 percent reduction in output data rate by alternating the readout of two sets of horizontal pixel pairs arranged in two complementary checkerboard patterns. Additionally, the overall power consumption of the imager is less than two Watts.

“This is an important milestone for imec to demonstrate our capability to co-design, prototype and manufacture high performance CMOS image sensors in our 200 mm CMOS fab,” commented Rudi Cartuyvels, Senior Vice President Smart Systems & Energy Technologies at imec.