Search results for "Synopsys"

Synopsys and TowerJazz have revealed that they have qualified Synopsys' unified mixed-signal IC design solution for TowerJazz's power management analog/mixed-signal reference design flow (Reference Flow 2.0) and 180-nanometer Power Management interoperable process design kit. Synopsys' tool suite, the foundry iPDK and reference design flow are verified to seamlessly work together to enable designers to quickly become productive.

Synopsys have today revealed the availability of the 2012.06 release of its IC Compiler software, featuring multiple advances to support giga-performance design. IC Compiler has been addressing the productivity and manufacturability challenges inherent in giga-performance design through smarter optimization, faster design convergence and advanced process node support.

Synopsys announced that its industry-first PCI Express controller IP with support for low-power sub-states has successfully taped out in multiple designs. The addition of the L1.1 (snooze) and L1.2 (off) sub-states to Synopsys' DesignWare controller IP for PCI Express 1.0, 2.0 and 3.0 enables designers to reduce power consumption in key market segments, including camera, card reader, networking and wireless applications serving the ultrabook and ...

Synopsys, Inc. today announced that Infineon Technologies AG has used Synopsys' Virtualizer tool set to deploy virtual prototypes of their AURIX microcontroller-based systems, enabling early software development and customer engagement prior to silicon availability.

Synopsys, Inc. today announced that BiTMICRO Networks has chosen Synopsys as its electronic design automation (EDA) provider for system-on-chip (SoC) design. BiTMICRO recently announced the successful tapeout of two third-generation SSD controllers, which are the foundation of its next-generation products, using Synopsys' Galaxy Implementation and Discovery™ Verification Platforms to speed SSD controller development.

SpringSoft, Inc. and Synopsys, Inc. today announced that they have linked SpringSoft's Verdi Automated Debug System with Synopsys' Protocol Analyzer. Part of the Synopsys Discovery VIP family, Protocol Analyzer enables engineers to quickly understand, identify and debug protocols in their designs. Through this linkage, the identified protocol violations and errors are seamlessly passed to the Verdi environment for detailed signal-level analysis t...

Synopsys, Inc. today announced the release of a new Deep Trace Debug feature for users of its HAPS FPGA-based prototyping systems. With HAPS Deep Trace Debug, prototypers can take advantage of approximately 100 times more signal storage capacity than the traditional memory storage employed by on-chip FPGA logic debuggers.

Synopsys Inc introduced Proteus LRC for lithography verification. Proteus LRC provides comprehensive, process-window-aware checking features to identify locations in a design that are sensitive to process variations, thereby enabling corrective action to be taken prior to committing a design to manufacture. Proteus LRC is integrated into the Proteus Mask Synthesis flow and is targeted for use by OPC and mask data preparation groups at semiconduct...

Lattice Semiconductor announced release 1.2 of its Lattice Diamond FPGA design software tool suite, the flagship design environment for Lattice FPGA products. Users of the new MachXO2 PLD devices can now generate complete systems based on the LatticeMico8 open source 8-bit controller core using the LatticeMico™ System tool, which is available with the Lattice Diamond design environment.

Lattice Semiconductor Corporation today announced release 1.4 of its Lattice Diamond design software, the design environment for Lattice FPGA products. Users of Lattice Diamond 1.4 software will benefit from several usability enhancements that make FPGA design exploration easier and reduce time to market.