Search results for "Synopsys"
Synopsys to Acquire Magma Design Automation
Synopsys has signed a definitive agreement to acquire Magma Design Automation Inc. a provider of chip design software headquartered in San Jose, California. Bringing together complementary technology, development and support capabilities will enable the combined company to more rapidly meet customer requirements linked to chip designs at both leading-edge and mature process nodes.
Synopsys Announces Earnings Release Date and Conference Call for the Fourth Quarter and Fiscal Year 2011
Synopsys has announced it will report results for the fourth quarter and fiscal year 2011 on Wednesday, Nov. 30, 2011, after the market close. A conference call to review the results will begin at 2 p.m. PT (5 p.m. ET) and will be hosted by Aart de Geus, chairman and chief executive officer, and Brian Beattie, chief financial officer.
Synopsys Posts Financial Results for First Quarter Fiscal Year 2012
Synopsys, Inc. today reported results for its first quarter of fiscal year 2012. For the first quarter of fiscal year 2012, Synopsys reported revenue of $425.5 million, compared to $364.6 million for the first quarter of fiscal 2011, an increase of 16.7 percent.
Synopsys Hosts Special Events with Industry Leaders at DAC 2012
Synopsys, Inc. will host several special events at the Design Automation Conference, June 3 - 7 in San Francisco, California. The events will feature speakers from leading semiconductor companies, IP providers, foundries and Synopsys.
Synopsys CFO Brian Beattie to Speak at NASDAQ OMX 26th Investor Program
Synopsys announced that Brian Beattie, chief financial officer, will speak at the NASDAQ OMX 26th Investor Program in London on June 21, 2011.
Samsung Electronics Tapes out Gigahertz+ ARM Cortex-A15 Processor with Synopsys IC Compiler
Synopsys, Inc. today announced the successful collaboration between Synopsys and Samsung Electronics on the implementation of an ARM Cortex-A15 MPCore processor. The processor core was implemented by Samsung Austin Research Center (SARC) using Synopsys IC Compiler place-and-route technology, a cornerstone of the Synopsys Galaxy Implementation Platform.
Xilinx ISE Design Suite 12 Enables Up to 30% Dynamic Power Reduction with Intelligent Clock-Gating Technology
Xilinx introduced the ISE Design Suite 12 software to enable breakthrough optimizations for power and cost with greater design productivity. For the first time, ISE design tools deliver 'intelligent' clock-gating technology that reduces dynamic power consumption by as much as 30 percent. The new suite also provides advances in timing-driven design preservation, AMBA 4 AXI4-compliant IP support for plug-and-play design, and an intuitive design fl...
New eTools 8.0 Software Simplifies 45nm ASIC Design
eASIC Corporation, a provider of NEW ASIC devices, today announced the immediate availability of its eTools 8.0 software suite for implementing 45nm Nextreme-2 designs. The eTools 8.0 tool suite delivers a robust ASIC grade design flow with the simplicity, ease of design, and a cost point that is normally associated with FPGA design tools. By focusing on ease-of-use, and low cost of entry, eASIC is now enabling designers to make a seamless transi...
ON Semiconductor - Cost Competitive 0.18 µm CMOS Manufacturing Process for Digital and Mixed-Signal ASICs
ON Semiconductor has expanded its custom foundry capabilities with the launch of a new cost competitive, industry compatible 0.18 micron (µm) CMOS process technology. The ONC18 process is an ideal platform for developing low power and highly integrated digital and mixed-signal application-specific integrated circuit (ASIC) devices for automotive, industrial and medical applications. The ONC18-based solutions will be manufactured at ON Semiconduc...
Synopsys enhances Synplify FPGA synthesis software to enable higher reliability FPGA design
Synopsys, Inc. announced availability of the latest release of its Synplify Pro and Synplify Premier FPGA synthesis tools. The new Synplify tool release enables engineers to build higher reliability into their FPGA designs through a new feature that provides automated creation and preservation of error-correction logic, including safe finite-state machines (FSMs). Additionally, an enhanced interface for the tool allows designers to track progress...