Search results for "EDA"
Toshiba support for GSA & IET International Semiconductor Forum includes keynote address and access to ASIC and Foundry specialists
Toshiba Electronics Europe has announced its active support for the GSA & IET International Semiconductor Forum on 2nd and 3rd June 2009. The TEE ASIC and Foundry business unit will be exhibiting at the forum as well as offering private meetings with its team of specialists. Mr Noguchi, Technology Executive with the System LSI Division of Toshiba Semiconductor Company, will present a keynote address during the Forum’s conference sessions.
Mentor Graphics Announces Logic and Physical Synthesis Support for Xilinx 7 Series FPGAs
Mentor Graphics Corporation today announced that its advanced synthesis products support Xilinx 28nm 7 series field programmable gate arrays (FPGAs). Xilinx 7 series FPGAs are built on a low-power and unified FPGA architecture that scales across low-cost and ultra high-end families. Support for the new 28nm Virtex-7 and Kintex-7 FPGA families is available now and support for Artix-7 will follow. Mentor Graphics is the first EDA FPGA synthesis pro...
OpenET Alliance announces Envelope Tracking interface spec for energy efficient 4G handsets
The OpenET Alliance h\s announced that it has released a new API specification for 4G handsets to support further industry collaboration. Envelope Tracking is the most effective wide-band power optimisation technology for the RF front end of 3G and 4G handsets.
High-performance Package Structure Simulation via EEsof
Peter Lin from Agilent Taiwan EEsof EDA Team will demonstrate how to use the innovative simulation software to address poor-quality signals challenges caused by inadequate package structure design, to help customers easily pass compliance tests.
Intercept Releases New User Interface: Pantheon 7
Intercept Technology, Inc. has announced the availability of its next major software release, Pantheon 7beta. A monumental departure from its former version, the new Pantheon includes a completely redesigned user interface with significant performance and productivity increases across the entire design team user flow.
Docea Power Secures $1.5M in VC Funding
Docea Power SAS, announces it secured $1.5M in VC money after the successful launch of its Aceplorer product in 2009. The funds, raised from Rhône-Alpes Création, Alps Development Sustainable Investment, Siparex, Octalfa, and private investors, will be used to expand the company’s product offering and to increase its commercial deployment abroad, notably in Asia and the United States.
AWR Releases Visual System Simulator 2010
AWR Corporation, the innovation leader in high-frequency EDA, today announced the commercial release of its 2010 Visual System Simulator™ (VSS) software. The release offers new capabilities that increase productivity for RF system designers; including time delay neural network (TDNN™) advanced amplifier behavioral models for capturing memory effects and measurement data interchange format (MDIF) model support, as well as a new phased ...
IPC RELEASES NEW REVISION OF SURFACE MOUNT DESIGN AND LAND PATTERN STANDARD
IPC — Association Connecting Electronics Industries has released the B revision of IPC-7351, Generic Requirements for Surface Mount Design and Land Pattern Standard. The leading industry standard for surface mount land pattern design and layout, IPC-7351B provides designers and printed board fabricators with updated guidance on requirements of land pattern geometries used for the surface attachment of electronic components, as well as surface m...
Agilent Technologies Advanced Design System 2011 EDA Platform to Debut via YouTube and Webcast
Agilent Technologies Inc today announced the latest version of its flagship RF and microwave design and simulation platform, Advanced Design System 2011. The new platform will debut on YouTube and in an Innovations in EDA webcast with Microwave Journal, scheduled for March 1.
ZMDI SYeNa edacentrum announce innovative technology for affordable auto safety systems
ZMD AG today announced the results of the SyEnA (synthesis-supported design of analog circuits) research project, which is funded by the Federal Ministry of Education and Research.