Search results for "EDA"
Tensilica DPU Family Delivers 10 GigaMAC/sec DSP Performance, Tops 1 GHz Mark
Tensilica has introduced the Xtensa LX3 high-performance dataplane processor (DPU) core optimized for digital signal processing (DSP) and control in the system-on-chip (SOC) dataplane. The Xtensa LX3 DPU offers the industry's widest range of pre-verified DSP options ranging from a simple floating point accelerator to a 16-MAC (multiply accumulator) vector DSP powerhouse.
Top EDA Companies Endorse Tensilica's Pin-Level SystemC Models
Tensilica has announced that it has expanded the range of processor modeling options with the introduction of pin-level SystemC models of its Xtensa customizable dataplane processors (DPUs). With this novel feature, Tensilica now offers the widest array of modeling choices of any provider of licensable microprocessor or DSP (digital signal processing) IP cores.
Zuken Introduces Free CADSTAR Express 12.1
The free evaluation version of CADSTAR 12.1 with all the latest functionality, is now available to download from Zuken.com. When companies are making the decision about what software to use, a demo isn’t enough. Designers want to get their hands dirty and see if the tools really live up to what the EDA companies are promising. The Express version of CADSTAR is a fully functional CADSTAR (limited to 300 pins and 50 components), allowing designer...
CADSTAR Recruitment Drive in North America
Zuken announces that it is seeking experienced EDA professionals to join their North American independent sales network in order to meet the growing demand from the region for CADSTAR, Zuken’s desktop PCB design solution. In 2008 Zuken witnessed a significant increase in uptake of CADSTAR across the continent, and in response is launching a recruitment drive to meet the demands of the market.
Zuken Adds Support for IPC-2581, Joins Newly Formed Consortium
Zuken has announced its support for the IPC-2581 electronic data transfer format. IPC-2581 is a generic standard for printed circuit board manufacturing description data and transfer methodology. Zuken is a founding member of a new cross-industry consortium that has been established to support the standard.
Synplicity Launches ReadyIP Program: the Industry’s first Universal, Secure IP Flow for FPGA Implementation
Synplicity®, Inc. today announced the ReadyIP Initiative, a program that takes aim at simplifying the access, evaluation, and use of intellectual property (IP) for FPGA-based system design. The ReadyIP program delivers the industry’s first and complete universal, encrypted design methodology for FPGA implementation, allowing users to incorporate and easily integrate IP from several third-party vendors within their designs using the Synplify Pr...
Synplicity CTO to Deliver Keynote on FPGAs at 65
Synplicity has announced that Ken McElvain, the company's co-founder and chief technical officer, will deliver a keynote address at FPL 2006 in Madrid, Spain. The keynote address, titled, FPGAS at 65 nm and Beyond - Powerful New FPGAs Bring New Challenges, will take place on August 28, 2006, the first day of the conference.
National Instruments and TSSI Collaborate to Support WGL and STIL Semiconductor Vector Formats
National Instruments has announced its collaboration with Test System Strategies, Inc. (TSSI), inventor of the Waveform Generation Language (WGL), on a new software tool that is compatible with NI LabVIEW graphical system design software. This software tool makes it possible for semiconductor test engineers to import WGL and IEEE 1450 Standard Test Interface Language (STIL) simulation vectors into NI PXI digital test systems, a task which previou...
Altera's Quartus II 6.0 offers integrated HDL support for Aldec's Simulator
Aldec has announced that its simulator now has integrated HDL support from Altera's Quartus II version 6.0 development software environment. Mutual customers can now select Aldec's HDL Simulator, Active-HDLT, directly from Altera's Quartus II software version 6.0.
European Research Project Aims for Greener Electronics
The partners in a new publicly-funded research project today announced details of the multinational/multidisciplinary program: “END — Models, Solutions, Methods and Tools for Energy-Aware Design.” This three-year ENIAC (European Nanoelectronics Initiative Advisory Council) project is designed to enhance the competitiveness of Europe’s semiconductor and electronics equipment companies in developing new products and technologies that are at...