Search results for "Synopsys"
SynaptiCAD's Timing Diagram Editors Simplify FPGA Synthesis
SynaptiCAD has released an updated version of it's industry-leading timing diagram editor family that simplifies creating the Synopsys Design Constraint files used to define the timing requirements for FPGA synthesis tools. New versions of Timing Diagrammer Pro, WaveFormer Pro, and DataSheet Pro enable designers to automatically generate SDC commands from timing diagram data extracted from IC data sheets.
PRO DESIGN Launches Virtex 7 2000T Multi FPGA based Prototyping System
PRO DESIGN today announced the launch of its new product family of FPGA based prototyping systems called proFPGA. PRO DESIGN was in the past known as vendor of the successful CHIPit prototyping solutions. This CHIPit business unit was acquired by Synopsys end of 2008. PRO DESIGN formed a new development team of very talented and knowledgeable engineers.
Synopsys Introduces Memory Test and Repair Solution for Designs at 20 Nanometers and Below
Synopsys today announced a new release of its DesignWare STAR Memory System, an automated pre- and post-silicon memory test, debug, diagnostic and repair solution that enables designers to improve quality of results, reduce design time, lower test costs and optimize manufacturing yield.
New FPGA-Based Prototyping Solution Delivers Up To 3x System Performance Improvement
Synopsys today announced the availability of Synopsys' HAPS-70 Series FPGA-based prototyping systems, extending its HAPS product line to address the increasing size and complexity of system-on-chip designs. The HAPS-70 systems provide tightly integrated prototyping software and hardware, including high-speed time-domain multiplexing (HSTDM) technology, which in combination with new HapsTrak 3 I/O connectors delivers up to 3x prototype performance...
Synopsys Extends Support for ARM AMBA Protocol Verification with New Performance Checker for AMBA 4 AXI4
Synopsys today announced that its next-generation Discovery Verification IP (VIP) for the ARM AMBA 4 AXI4 protocol now offers a Performance Checker capability. This capability enables system-on-chip (SoC) verification teams to analyze and validate SoC performance using metrics established during the system architecture definition process, speeding up the debug of SoC performance bottlenecks.
ST adopts Synopsys' volume diagnostics solution for faster yield ramp
Synopsys today announced that ST has adopted Synopsys' volume diagnostics solution company-wide for faster yield ramp. IC product teams must rapidly isolate and correct systematic failure mechanisms to ramp up new IC designs from low initial yield to mature yield in volume production.
Synopsys and TSMC Collaborate for 20nm Reference Flow
Synopsys today announced 20-nanometer (nm) process technology support for the TSMC 20nm Reference flow. This includes Synopsys Galaxy Implementation Platform support for the latest TSMC 20nm design rules and models.
UMC Qualifies Synopsys' IC Validator for 28-nm Physical Verification
Synopsys today announced that Synopsys' IC Validator physical verification product has been qualified by United Microelectronics Corporation for 28-nm physical signoff, with immediate availability of design rule checking (DRC) and layout-vs.-schematic (LVS) runsets to UMC customers.
Synopsys and TSMC Deliver 3D-IC Design Support
Synopsys today announced that it is delivering a comprehensive 3D-IC design solution that is included in TSMC's CoWoS (Chip on Wafer on Substrate) Reference Flow. The design flow is the result of the latest collaboration between the companies on 3D-IC integration technologies.
Synopsys' Saber Physical Modeling and Simulation Platform to be used in 57 Worldwide Automotive Design Educational Programs
Synopsys, Inc today announced it has joined the Partners for the Advancement of Collaborative Engineering Education (PACE) program. Through the PACE program, Synopsys' Saber product line for the modeling and simulation of power, physical and multi-domain automotive systems will be provided to all 57 PACE institutions worldwide.