Search results for "EDA"

Magma Design Automation today announced the LFoundry’s interoperable process design kits are validated for use with the Titan Mixed-Signal Design Platform, Titan Acclerators and FineSim circuit simulator for 0.15-micron technology platforms. The combination of Magma’s Titan and FineSim software and LFoundry’s process technology will accelerate development of analog/mixed-signal (AMS) products, especially for European system-on-chip (SoC) de...

Magma Design Automation announced today that ARM (LSE: ARM; Nasdaq: ARMHY) has successfully utilized Magma’s SiliconSmart characterization and modeling software suite to enhance and expand ARM’s production characterization system for Physical IP products. This fast, accurate and easy-to-use characterization system will assist ARM in delivering standard cell and I/O libraries.

Magma Design Automation Inc., a provider of chip design solutions, today announced TSMC has included the QCP™ extractor in TSMC’s quarterly EDA qualification report for 28-nanometer (nm) integrated circuits (ICs). This qualification gives designers additional confidence in using QCP to address the increasing complexity of ICs implemented in TSMC’s 28-nm processes.

Magma® Design Automation have announced that the new pattern matching capability in the Quartz™ DRC physical verification product has been qualified to support DRC+, GLOBALFOUNDRIES' silicon-validated, yield-critical pattern-based design for manufacturing (DFM) verification flow for all advanced process technologies, including 40 nanometer (nm), 28 nm and below.

Mentor Graphics Corporation has announced that Fujitsu Semiconductor has standardized on the Mentor Graphics HyperLynx Signal Integrity technology as the company’s LSI-IC Packaging (PKG)-Printed Circuit Board (PCB) co-design tool for fast and accurate high-speed simulation and analysis. For today's highly functional end-products, bus speeds are increasingly getting faster and the demand for noise timing-aware LSI-PKG-PCB co-design is increasing...

At the 2010 International Test Conference (ITC), GOEPEL electronic, a global leader in JTAG/Boundary Scan solutions, introduces TAP Checker™ a new generation EDA software tool for verification of BSDL (Boundary Scan Description Language) files and validation of JTAG implementations in integrated circuits. The innovative tool suite enables the automatic generation of simulation vectors and test patterns for chip-level validation and verification...

Start-up EDA company, Teklatech will debut its new EDA software tool, FloorDirector, at the DATE show March 10-14 ICM in Munich. Using its new floorplanning and clock distribution technology, semiconductor vendors can overcome critical dynamic voltage drops which can result in unpredictable signal integrity and noise effects that can cause silicon failure.

Agilent Technologies Inc today announced the latest version of its flagship RF and microwave design and simulation platform, Advanced Design System 2011. The new platform will debut on YouTube and in an Innovations in EDA webcast with Microwave Journal, scheduled for March 1.

Agilent Technologies Inc. today announced Integrated Circuit Characterization and Analysis Program (IC-CAP) Wafer Professional (WaferPro) software. The new software provides a multi-site, multi-wafer, automated DC and RF measurement solution for semiconductor device modeling applications.

Agilent Technologies announced that its Advanced Design System (ADS) software has been selected by Paratek Microwave for use in development of tunable antenna modules for the mobile handset market. The accuracy, capacity and performance offered by ADS aid Paratek in the design of optimized modules as well as in the creation of models for its customers.