Search results for "Synopsys"
Illumination design software features automotive modeling and analysis
Version 8.1 of the illumination design software, LightTools, has been announced by Synopsys. Featuring speed improvements for tracing backward rays and generating photorealistic images, this enhanced version provides new modeling and analysis features for general lighting, automotive and biomedical applications.
First USB 3.1 platform-to-platform Host-Device IP data transfer achieved
The industry's first SuperSpeed USB 10 Gbps (USB 3.1) platform-to-platform Host-Device IP data transfer has been achieved by Synopsys. The IP realized 10 Gbps USB 3.1 effective data rates of more than 900 MBps between two Synopsys HAPS-70 FPGA-based prototyping systems while using backward-compatible USB connectors, cables and software.
New NVM IP cuts power consumption by up to 90%
The new DesignWare AEON Multiple-Time Programmable (MTP) Ultra Low-Power (ULP) Non-Volatile Memory (NVM) IP has today been made available by Synopsys. Optimized for the stringent power and area requirements of wireless and RFID/NFC ICs, the DesignWare AEON MTP ULP NVM IP cuts power consumption by up to 90% compared to the previous generation by offering a single-bit read capability, read operation down to 0.9V and peak current under 10uA during e...
Synopsys and CEVA Deliver Superior Performance, Power and Area for CEVA DSP Cores with DesignWare HPC Design Kit
Synopsys and CEVA have collaborated to create highly optimized implementations of the CEVA-XC DSP cores targeting the high-performance needs of base-station applications and the low-power requirements of handset applications. CEVA used Synopsys' DesignWare High Performance Core (HPC) Design Kit to optimize its DSP for performance, power and area, achieving an 8 percent improvement in performance at 1.3 GHz maximum operating frequency for its base...
Connectivity drives revision
A recent spate of revised 32bit microcontrollers hints at the increasing importance of connectivity, but at the cost of ultra-low power. ES Design magazine Editor, Philip Ling reports.
Synopsys extends Platform Architect with MCO technology
The new extended Platform Architect has been announced by Synopsys. The extended Platform Architect includes multicore optimization (MCO) technology performance exploration solution for ARM AMBA 4 interconnect-based SoCs to support ARM CoreLink NIC-400 network interconnect-based designs. Synopsys Platform Architect MCO and Synopsys' new SBL-400 SystemC model of the ARM CoreLink NIC-400 network interconnect enable SoC architects to efficiently ex...
Leti-UTSOI2 available in all major SPICE simulators
Leti-UTSOI2, the first complete compact model that enlarges the physically described bias range for designers, is now available in all major SPICE simulators. Accounting for back interface inversion in ultra-thin body & box (UTBB) transistors, the updated modelmaintains a formal symmetry between front and back interface in all equations of the core model.
Synopsys Introduces DesignWare ARC EM SEP Processor for Safety-Compliant Automotive Systems
Synopsys, Inc. today announced availability of the new DesignWare ARC EM SEP (Safety Enhancement Package) Processor core for automotive safety-compliant applications. The 32-bit ARC EM SEP processor is based on the highly efficient ARC EM4 core. It delivers performance up to 300 MHz and power consumption as low as 16 mW/MHz on typical 65-nanometer (nm) low power silicon processes, with integrated hardware safety features that enable ASIL D compli...
TSMC awards Synopsys "Partner of the Year 2013"
Synopsys announce that TSMC awarded Synopsys its Open Innovation Platform "Partner of the Year 2013" for joint development of 16-nanometer FinFET design infrastructure. The award recognizes Synopsys' broad and deep technical expertise and shared commitment to the development and delivery of TSMC's 16-nm Reference Flow, validated on a quad-core ARM Cortex-A15 mobile processor design
Synopsys and TSMC collaborate for 16-nm custom design reference flow
Synopsys has collaborated with TSMC to provide support for voltage-dependent design rules in TSMC's 16-nm Custom Design Reference Flow. As part of TSMC's custom design infrastructure, TSMC has also certified Synopsys' Laker custom design solution and circuit simulation tools that deliver new capabilities for TSMC V0.5 16-nm FinFET process layout design rules, device models, and electromigration and IR-drop analysis. TSMC and Synopsys will continu...