Search results for "EDA"
Synopsys Acquires RSoft Design Group
Synopsys, Inc. today announced it has completed the acquisition of privately held RSoft Design Group, Inc. (RSoft). The combination of Synopsys' imaging and illumination design products with RSoft's photonics design products extends Synopsys' platform to provide a more complete set of optical solutions to current customers, as well as to support new technologies, applications and markets as they emerge.
Renesas Adopts Synopsys' Proteus LRC for Lithography Verification
Synopsys, Inc. today announced the production qualification and adoption of Synopsys' Proteus LRC at Renesas Electronics Corporation, the world's premier supplier of microcontrollers and a world's leading supplier of advanced semiconductor system solutions including microcontrollers, SoC solutions and a broad-range of analog and power devices. Proteus LRC provides large-scale integrated circuit (LSI) manufacturers like Renesas with a highly accur...
Renesas Technology selects Synopsys' Proteus OPC for 45nm node production
Synopsys today announced that Renesas Technology has adopted Synopsys' Proteus OPC for 45nm production. With the introduction of 45nm and below technologies, the demand for optical proximity correction (OPC) becomes greater due to design complexity and layer volume, making time to market and cost of ownership critical factors in OPC vendor selection. Proteus OPC is the industry’s most cost-effective solution since its highly scalable engine ru...
Sunplus selects Synopsys as its primary EDA partner
Synopsys has announced that Sunplus Technology Co., Ltd, a leading provider of advanced IC solutions for home entertainment applications, has signed an expanded business agreement to establish Synopsys as its primary EDA partner. Under the new multi-year agreement, Sunplus has consolidated on Synopsys’ Galaxy Implementation and Discovery Verification Platforms for their chip development and design flows, and has extended its use of Synopsys Des...
Synopsys delivers custom design solution for TSMC Analog/Mixed-Signal Reference Flow 1.0
Synopsys announced that it has collaborated with TSMC to validate Synopsys’ custom design solution with TSMC’s 28-nanometer (nm) interoperable process design kit (iPDK) and Analog/Mixed-Signal (AMS) Reference Flow 1.0. TSMC’s 28nm reference phase-locked loop (PLL) design was used to validate Synopsys’ comprehensive custom solution while demonstrating productivity-enhancing capabilities of the TSMC AMS Reference Flow 1.0. The validated sol...
Synopsys Acquires High-level Synthesis Technology from Synfora, Inc.
Synopsys announced it has acquired technology, engineering resources and other assets of Synfora, Inc., a provider of C/C++ high-level synthesis tools used to design complex systems-on-chips (SoCs) and FPGAs. The asset acquisition strengthens Synopsys' position in system-level design and verification and enhances the company's FPGA-based prototyping solutions.
Synopsys' IC Validator Completes Qualification for TSMC's 40-nm and 65-nm iDRC/iLVS Physical Verification
Synopsys announced that its IC Validator physical verification product is qualified for TSMC's 40-nm and 65-nm interoperable DRC/LVS runsets, and is immediately available to TSMC customers. IC Validator, part of the Galaxy™ Implementation Platform, is an ideal add-on to IC Compiler for In-Design physical verification. By enabling physical verification within the implementation flow, IC Validator enables place and route engineers to accelerate t...
Real Intent’s Real Talk Blog Addresses Verification Topics
Real Intent Inc., the innovator in automating the intelligence of formal techniques for design verification, announced today that it has launched the Real Talk blog. The new weekly blog addresses topics of interest to the Electronic Design Automation’s verification community, including innovative design verification technology, viewpoints, user experiences, and success stories. To contribute or subscribe to the Real Talk blog, please visit www...
Lattice Updates Software Design Tools for Hot Swap Control and Power Management
Lattice Semiconductor Corporation has announced Version 5.2 of its PAC-Designer mixed signal design tool suite with new device support and productivity features. The PAC-Designer 5.2 software now supports two new higher performance Power Manager II products: the ispPAC®-POWR1014-2 and ispPAC-POWR1014A-2 devices. The POWR1014/A-2 devices are ideal for integrating Hot Swap control, voltage rail supervision and power supply sequencing ICs. PAC-Desi...
3D EM for Power Integrity Analysis
Engineers working on the design of power delivery networks will benefit from CST’s latest addition to CST STUDIO SUITE. The new CST PCB STUDIO Power Integrity solver, based on a special 3D FEM approach, helps calculate accurate impedance profiles within a full 3D simulation, but in a fraction of the time required by traditional 3D solvers.