Search results for "ASIC"
Innovative tech drives rapid deployment of new 5G products
The wireless future is about developing the most compelling products using a combination of advanced technologies to maximise system performance, while optimising both cost and power. Brendan Farley, VP Wireless Engineering & MD EMEA at Xilinx explains.
IP platform delivers faster time to market for ADAS ASICs
Bringing a new chip to the automotive market can be daunting due to the high safety standards required - ISO 26262. Sondrel has made this much easier for customers with the launch of its new, quad-channel, IP reference platform that has been architected with ISO26262 applications and the fast integration of customer IP in mind from the start.
Top five design products in May
Electronic Specifier takes a look at the top five design products released in May.
Cloud hyperscale accelerated with 112G-LR SerDes IP
Cadence Design Systems has unveiled its third-generation 112G long-reach (112G-LR) SerDes IP on TSMC’s N5 process for hyperscale ASICs, artificial intelligence/machine learning (AI/ML) accelerators, and switch fabric systems on chip (SoCs).
Complete radio platform for 5G O-RAN ecosystem
Analog Devices has announced an ASIC-based radio platform for O-RAN compliant 5G radio units that is designed to shorten time to market and meet the evolving needs of 5G networks. The O-RAN ecosystem uses open standards to disaggregate the traditional network and allow greater flexibility and additional features across carrier networks.
Farnell adds Google AIY project kits
A selection of complete AIY project kits and Coral USB accelerators from Google are in stock at distributor Farnell.
Driver monitoring system ASIC with AI neural processing
OmniVision Technologies has announced the OAX8000 AI-enabled, automotive application-specific integrated circuit (ASIC), which is optimised for entry-level, stand-alone driver monitoring systems (DMS). The OAX8000 uses a stacked-die architecture to provide the industry’s only DMS processor with on-chip DDR3 SDRAM memory (1GB).
Tiempo selects IC'Alps for silicon implementation
Tiempo Secure and IC’Alps have announced a strategic collaboration to widespread silicon implementation of Common Criteria (CC) EAL5+ grade Secure Element cores for IoT applications. Specifically, Tiempo Secure is relying on IC’Alps’ expertise in physical design implementation to develop the hard macro of its Secure Element named TESIC, from netlist to GDSII.
Sondrel appoints Redtree as representative in Israel
Israel is a hot bed of innovation, with many technology companies having offices there, along with a very strong start-up culture. As this means there is a greater demand for ASIC design resources than can be met locally, Sondrel has appointed Redtree Solutions as its local representative for its design services.
Family of reference designs launched to reduce design costs
Sondrel has launched a family of reference designs that could reduce design costs, risk and time by up to 30% compared to starting from scratch. The company has drawn on its experience of designing hundreds of ASICs to create a set of key reference designs that each provide a fast design time for high growth markets.