Search results for "Synopsys"

Synopsys, Inc. has announced the industry's most comprehensive independent ISO 26262 functional safety assessment and certification for all the tools in the Synopsys Design Platform, enabled by Synopsys' Fusion Technology. This certification allows automotive semiconductor component and system designers to meet the most stringent safety-related requirements for modern-era vehicles.

Synopsys, Inc. has announced it has worked with Renesas Electronics to contribute to the development of Renesas' latest R-Car V3H system-on-chip (SoC). The R-Car Family of SoCs is the core SoC family of the open, innovative, and trusted Renesas autonomyPlatform which delivers end-to-end automotive solutions scaling from secure cloud connectivity and sensing to vehicle control.

Synopsys, Inc., in collaboration with ANSYS, has announced the immediate availability of RedHawkAnalysis Fusion, a complete in-design power integrity add-on solution for Synopsys IC CompilerII place-and-route system users. Synopsys brings to production a fully integrated rail analysis flow that leverages IC Compiler II's best in-class power, performance, and area (PPA) with industry-standard RedHawk rail analysis from ANSYS.

Synopsys, Inc. has unveiled its breakthrough Fusion Technology that transforms the RTL-to-GDSII design flow with the fusion of best-in-class optimisation and industry-golden signoff tools, enabling designers to accelerate the delivery of their next-generation designs with industry-best full-flow quality-of-results (QoR) and the fastest time-to-results (TTR).

Synopsys has announced that it has added the ChaCha20 and Poly1305 (RFC7539) algorithms to its DesignWare Multipurpose Security Protocol Accelerator IP, enabling designers to efficiently implement the latest encryption and authentication functionality to protect their IoT SoCs. The Security Protocol Accelerator IP increases security protocol performance by supporting efficient data sequencing as well as parallel processing of cryptographic operat...

Synopsys has announced the availability of the complete Universal Flash Storage (UFS) IP solution, compliant with the latest JEDEC UFS v3.0 standard. The high-throughput, low latencyDesignWare UFS 3.0 IP solutiondoubles the bandwidth to 11.6Gbps per lane for a faster interface between SoCs and storage ICs, compared to UFS 2.1. The power efficient MIPI M-PHY delivers less than 3.5mW/Gbps per lane by supporting a range of burst modes and power mana...

At the embedded world 2018 conference in Nuremberg, Germany, taking place 27th February to 3rd March, Synopsys will showcase its electronic design, IP, and application security solutions. During the conference, Synopsys will also host Elevate, an evening thought-leadership event featuring a group of international cyber security experts leading a discussion about IoT and embedded systems security threats and solutions. Elevate is free and open to ...

Microsoft has confirmed that Skype has fallen victim of a security flaw that can allow attackers to gain system-level privileges to vulnerable computers. However, the company won’t immediately fix the issue because doing so would require a complete code overhaul.

Synopsys hasannounced its Coverity 2018.01 release, the newest version of its static analysis tool, which analyses source code to detect critical quality and security defects early in the software development life cycle. Coverity 2018.01 extends the tool’s support for new programming languages, coding standards, and development tool integrations.

In order to accelerate software development for the ARC HS processor family,Synopsys has announced availability of the DesignWare ARC HS Development Kit. The ARC HS Development Kit is a ready-to-use software development platform that includes access to the embARC open source software packages on the embARC website, enabling designers to start software development prior to SoC availability.