Search results for "ASIC"
Royalty-free access to high-performance XAP 16-bit processors through MOSIS deal with Cambridge Consultants
MOSIS has partnered with Cambridge Consultants to offer customers royalty-free access to the XAP4 and XAP5 16-bit RISC processor cores - and - customers only have to pay 20% of the nominal license fee during prototype production, the balance of the fee not being due until devices go into volume production or are sold.
Shared wafer service on IBM’s 130nm 8WL process makes high-performance RF chip fabrication affordable
MOSIS, a provider of low-cost prototyping and small volume production services for custom ASICs, announces prototype and low volume fabrication access to IBM's fourth generation foundry technology, 8WL, the 130 nanometer (nm) silicon germanium (SiGe) bipolar complementary metal oxide semiconductor (BiCMOS) process. The process uses an emitter width of just 120nm and can be used to produce devices with an Ft of 100GHz. It creates low power devices...
MOSIS adds 0.25 micron SiGe BiCMOS technology multi-project wafer (MPW) fabrication
MOSIS, a provider of low-cost prototyping and small volume production services for custom ASICs, announces availability of the IBM 0.25 micron SiGe BiCMOS 6WL technology. Utilising the service gives ASIC designers access to this advanced technology at less than 10% of the cost of a dedicated wafer run, minimizsing up-front risk and costs. The process is suited to high-performance analogue chip design for consumer wireless applications including ...
EDA Solutions Announces Appointment as Sole Representative in Europe for Incentia Design Systems
EDA Solutions, sole representative in Europe for Tanner EDA, announced it has been appointed as the sole representative in Europe for Incentia Design Systems Inc. Incentia’s complete suite of industry-leading tools will be available in Europe via EDA Solutions, including: TimeCraft™, a static timing and signal integrity analyser, known for its fast runtime and capability to handle large designs; DesignCraft™, a complete logic synthesis tool...
eInfochips Becomes Authorized Tensilica Processor Design Center
Tensilica has announced that eInfochips has joined the Tensilica Xtensions Design Center Partner Program and is offering system-on-chip design services for customers using Tensilica’s Xtensa configurable processors or Diamond Standard processor cores. eInfochips has design centers in the US and India and a proven track record in design services ranging from silicon design and verification to physical design as well as board design and embedded...
Tensilica Expands Wireless Baseband Business Unit, Hires Texas Instruments Veteran Eric Dewannain as Vice President/General Manager
Tensilica today announced that it has expanded its baseband business unit and hired Eric F. Dewannain as vice president and general manager. Dewannain was previously general manager of the custom ASIC business unit at Texas Instruments, Incorporated (TI) and, prior to this, general manager of the cable broadband communications business unit. Dewannain has extensive business experience in mobile wireless infrastructure and broadband communication...
KPIT Cummins becomes Authorized Tensilica System-on-Chip (SoC) Design Center
Tensilica, Inc. today announced that KPIT Cummins (BSE: 532400; NSE: KPIT), a leading product engineering and IT consulting partner to manufacturing companies, has joined Tensilica's Xtensions partner network and become an authorized design center. As a Tensilica Xtensions partner, KPIT Cummins will extend its capabilities to support customers on Xtensa core-based designs for a broad range of ASICs for infotainment and consumer electronics applic...
Tundra Semiconductor Announces RapidIO Gen2 Program
Tundra Semiconductor today announced its new RapidIO Gen2 program. Backwards compatible with RapidIO Specification Rev 1.3, Tundra's new RapidIO solutions will offer OEMs increased system performance, reduced power consumption and lower system costs when designing next generation systems.
Licensable Interlaken protocol IP core for use in ASIC or FPGA designs.
Silicon Logic Engineering Inc. (SLE), a high-end semiconductor design services division of Tundra Semiconductor Corporation today announced the development of a licensable Interlaken protocol IP core for use in ASIC or FPGA designs.
A la pointe de l'industrie, Avago Technologies lance le premier Sérialiseur/Désérialiseur intégré ASIC 28 nm atteignant 30 Gbps.
Avago Technologies (AVGO au Nasdaq), l'un des principaux fournisseurs de composants d'interface analogiques pour les communications et les applications industrielles et grand public, a annoncé aujourd'hui que son nouveau cœur SerDes (Sérialiseur/Désérialiseur) avait atteint le débit avéré de 30 Gbps en technologie 28 nm. La firme a également annoncé qu'elle avait déjà livré plus de 150 millions de canaux SerDes intégrés à des circ...