Search results for "Synopsys"

Synopsys has announced that the Defense Advanced Research Projects Agency (DARPA) has selected Synopsys as a prime contractor for the Automatic Implementation of Secure Silicon AISS program. The program's goal is to automate the inclusion of scalable hardware security mechanisms in IP and system-on-chips (SoCs) to explore security versus other design trade-offs.

SK hynix hasannounced the launch of its DDR5 DRAM, a high-speed and high-density product optimised for big data, Artificial Intelligence (AI), and machine learning (ML) as a next generation standard of DRAM.

Synopsys has announced it has acquired Qualtera, a fast-growing provider of collaborative high-performance, big data analytics for semiconductor test and manufacturing.

Synopsys has announced that its collaboration with TSMC and Microsoft has delivered a highly scalable timing signoff flow for use in the cloud. This extensive, multi-month collaboration among the three industry partners speeds up the path to signoff next-generation systems-on-chips (SoCs).

Synopsys has announced that it has collaborated with Arm to enable tapeouts of optimised system-on-chips (SoCs) for early adopters of Arm's latest mobile IP, including Arm Cortex-A78 and Cortex-X1 CPUs, and Mali-G78 GPU.

USB4 solutions that maximise the performance of USB designs and ensure compliance with the USB standard to deliver accuracy and high signal fidelity have been introduced by Keysight Technologies.

Synopsys has announced certification of its digital and custom design platforms for TSMC's N5 and N6 process technologies. Synopsys' long-term collaboration with TSMC has resulted inacceleratingnext-generation product design for key vertical markets, including high-performance computing (HPC), mobile, 5G, and AI chip designs.

It has been reported that the government’s anticipated COVID-19 tracing app has failed crucial security tests and is not yet safe enough to be rolled out across the UK. It is understood the system has failed all tests needed in order for it to be included in the NHS Apps Library, including cyber security, clinical safety and performance.

Synopsys has announced the new DesignWare ARC HS5x and HS6x processor IP families for high-performance embedded applications. The 32-bit ARC HS5x and 64-bit HS6x processors, available in single-core and multicore versions, are implementations of a new superscalar ARCv3 Instruction Set Architecture (ISA) and deliver up to 8750 DMIPS per core in 16-nm process technologies under typical conditions, making them the highest performance ARC processors ...

Advantest has cancelled its VOICE 2020 Developer Conference in Scottsdale, Arizona due to health and safety concerns over the COVID-19 pandemic.