Verigy - Zero-Footprint Tester for Cost-Sensitive ICs and Microcontrollers

A typical 512 I/O channel configuration is available for under US$300,000. The V101 will be showcased at the SEMICON/WEST trade show in Verigy’s Booth #921, South Hall, July 14 to 16, 2009 at the Moscone Convention Center in San Francisco, California.



“The V101 brings the benefits of Verigy’s proven test technology know-how to this segment of the market for the first time,” said Jin Wei, Vice President, Application Specific Test Solutions (ASTS), Verigy. “This cost-sensitive market demands test solutions that deliver the best overall value. Taking this into account, we have designed a system for self-installation, self-maintenance, and self-diagnostics.”



Operating at up to a 100 MHz clock rate with up to 1024 I/O channels, the V101 tester delivers the performance needed to effectively and economically test today’s most cost-sensitive ICs and MCUs, typically used in a wide variety of low-end mobile communications and consumer products.



The V101 features a unique Tester-on-Board(TM) architecture which simplifies the tester hardware and configuration by placing the digital and DC resources directly on the board. This architecture supports multi-site efficiency with high throughput and at lower test costs. The V101 uses standardized components that make it easy to setup and maintain.



Added Jin Wei, “The simplicity of the V101 offers our customers a cost-effective, easy-to-use system that delivers unprecedented value. As a result, we are seeing interest from customers who test a variety of devices, as well as test houses and manufacturers focused exclusively in the cost-sensitive MCU market, who until now were not served by Verigy solutions.”



The V101 architecture places the digital and DC resources directly on the board which enables the system’s unprecedented combination of performance and low-cost. The architecture also makes it easy to expand or reduce capacity on the V101 as customers’ requirements change.



The V101 is designed to cost-effectively test 4, 8 and 16-bit MCUs and other low pin count, low-end IC devices. The digital instrument operates at up to 100 MHz clock rate, with up to eight DPS (device power supplies), and offers deep Vector Memory (60 M) and Capture Memory (8 M) to accommodate short device life-cycles and revisions, and provides a low noise floor for improved accuracy and yield. On-board MMUs (Multi-DC Measurement Units) lower the cost of the tester by eliminating the need for separate analog cards, and allow the testing of embedded A/D converters.



The V101 is the only test system optimized for wafer sort with support for direct probing. This eliminates the need for separate pogo tower or costly add-on interfaces to do wafer sort testing, resulting in a significant cost savings. The V101’s design also results in greater signal fidelity and simplified production setup at wafer sort.



The V101 uses Verigy’s proven and award-winning Stylus(TM) operating system software which is easy to learn and use. Stylus features direct EDA links for shorter program development time. Its STIL-based test programming simplifies test conversions of other STIL-based programs and, when combined with deep vector and capture memories, helps to reduce program development time significantly.