Test & Measurement
Verigy - SmartRA Redundancy Analysis Option for its V6000 WS Memory Test System
Verigy, the semiconductor test company, today introduced SmartRA (Scalable Memory Redundancy Technology), a memory redundancy analysis (RA) option for its V6000 WS test system. SmartRA provides a scalable, flexible, cost-effective solution that allows manufacturers to meet the expanding fail storage and performance requirements of redundancy analysis for DRAM.
VeriAs DRAM device densities continue to increase, so do the challenges of today's wafer sort testing, requiring greater test parallelism, higher test frequencies and increased levels of complexity in device redundancy. These factors result in unprecedented volumes of data during redundancy analysis. Consequently, the storage and performance required to capture fail data and effectively complete redundancy analysis are also reaching new levels.
Verigy designed SmartRA to meet these requirements and because the solution utilizes high-performance blade servers, manufacturers can add processing power for redundancy analysis as they need it, without impacting the test cell footprint. SmartRA is based on an open software architecture which makes it possible for customers to use Verigy-provided algorithms or develop their own for faster time to market and lower cost-of-test.
“Unlike other testers that include the RA processing in the tester architecture, the V6000 with SmartRA doesn’t require users to spend more on replacing hardware to maintain throughput and yield,” said Gayn Erickson, Vice President, Memory Test, Verigy. “SmartRA’s unique architecture and industry-leading throughput allow DRAM manufacturers to optimize their yield with scalable upgrades to provide the right performance at the lowest cost.”