Design
TSMC selects Synopsys Galaxy Implementation Platform for Integrated Sign-Off Flow
Synopsys has announced that TSMC selected Synopsys’ Galaxy Implementation Platform for its new Integrated Sign-Off Flow. The RTL-to-GDSII design flow deploys the advanced optimisation technologies of Synopsys’ Design Compiler synthesis and IC Compiler physical implementation solutions, and the PrimeTime sign-off and Star-RCXT extraction solutions—the industry yardsticks for IC design sign-off. The new flow is now available for 65nm designs with planned extensions into other process technology nodes.
“IDesign companies face the critical challenge of allocating expensive internal resources to validate libraries, EDA tools and design flows for a specific process node. Recognising the importance and need for production-quality design flows, TSMC and Synopsys are addressing the needs of these mutual customers while achieving high quality of results and fast cycle time. This flow seamlessly integrates proven Synopsys tools to provide mutual customers with an automated solution for implementing their chips in TSMC technologies.
“We are pleased that TSMC uses the Galaxy implementation and analysis tools for their own designs and now for the Integrated Sign-Off Flow the company recently introduced,” said Bijan Kiani, Vice President of Product Marketing at Synopsys. “With the Galaxy Implementation Platform fully encapsulated in TSMC’s Integrated Sign-Off Flow, we are helping mutual customers deploy Synopsys’ proven optimisation and sign-off technologies, resulting in lower overall design cost, lower power, improved manufacturing and faster chip completion.”