IP core doubles performance for embedded Linux applications

A single HS38 processor delivers up to 4200 DMIPS at speeds up to 2.2 GHz in typical 28-nanometer (nm) silicon, more than twice the performance of previous generation ARC 770D cores supporting Linux.

The ARC HS38's performance and low power consumption make it ideally suited to address the growing embedded control and signal processing demands of devices such as home routers and gateways, data centres, digital TVs, networked appliances and automotive infotainment.

The ARC HS Processor Family utilises the next-generation ARCv2 instruction-set architecture (ISA), which enables the implementation of high-performance embedded designs with low power consumption and a small silicon footprint.

The new HS38 processor has been optimised for embedded applications running Linux and offers excellent performance efficiency, delivering up to 1.93 DMIPS/MHz. On typical 28-nm processes, it achieves 2.2 GHz while consuming less than 90 milliwatts of power and occupying only 0.21 mm² of silicon area.

The processor has a full-featured memory management unit (MMU) supporting a 40-bit physical address space and page sizes up to 16 megabytes (MBs), giving designers the ability to directly address a terabyte of memory with faster data access and higher system performance.

It is also available in multicore configurations (dual-core and quad-core) with support for SMP Linux, full Level 1 (L1) cache coherency and up to 8 MBs of Level 2 (L2) cache. In addition, an optional floating-point unit (FPU) accelerates computations with support for single- and double-precision arithmetic instructions.

As with all ARC processors, the ARC HS38 is highly configurable, so users can determine the optimum hardware features to implement for their specific design, as well as extensible to enable the creation of user-defined hardware accelerators that are tightly coupled to the processor core.

The HS38 Processor is supported by the Synopsys MetaWare Development Toolkit for developing, debugging and optimising embedded software on ARC processors. The kit includes an optimised C/C++ compiler to generate highly efficient code, a debugger for maximum visibility into the software and a fast instruction set simulator (ISS) for pre-hardware software development.

An ARC HS Processor Family Virtualiser Development Kit (VDK) consisting of a processor and common peripherals is also available to run and debug software on a virtual prototype ahead of SoC availability. A fully cycle-accurate simulator is available for design optimisation and verification. Open source software support for the HS38 Processor includes an optimised Linux kernel as well as the GNU Compiler Collection (GCC), GNU Project Debugger (GDB) and associated GNU programming utilities (binutils).

For software development on hardware, the ARC AXS103 Software Development Platform provides a complete development environment with a rich set of peripherals, drivers, pre-built Linux images and application examples.  Additional hardware and software tools supporting software development for ARC HS processors are available from third-party partners, giving developers the flexibility to choose the best and most familiar tools for their design project.