Synopsys’ IC Compiler widely deployed at MediaTek

“In the rapidly expanding wireless communications sector, we face intense time-to-market pressures to deliver designs on schedule while realising aggressive performance, power and area goals,” said MediaTek. “Having taped out several complex chips with IC Compiler, we believe it is a key enabler for us to meet our design goals. IC Compiler is now the chosen solution for our designs.”

At MediaTek, hundreds of megahertz clock speeds and several complex clock domains coupled with a multi-power domain approach, including shutdown scenarios optimisation, make design closure challenging. Minimum die area and leakage power are also important factors. Market pressures allow only a very short tapeout schedule, so achieving faster design closure is critical. IC Compiler’s Zroute routing technology, its advanced placement, power and timing optimisation; its tight correlation to Synopsys’ PrimeTime(r) solution; and Synopsys’ StarRC(tm) custom parasitic extraction to minimise late-stage timing ECOs were all key elements driving broad adoption of IC Compiler at MediaTek.

“Continuous technology innovation and rapid response to market needs have established MediaTek as one of the top five fabless companies worldwide,” said Dr. Antun Domic, senior vice president and general manager, Implementation Group at Synopsys. “Collaborating with MediaTek on their cutting-edge chips has driven innovations in IC Compiler that reinforce its technology leadership position in place and route.”