SRAM architecture addresses need for 4K display driver ICs

Based on this technology, Dolphin Integration has announced a SRAM architecture specially designed to meet the requirements of the steadily expanding display driver market for high-resolution mobile handsets.

The SpRAM LYRA is designed for high density (through specific bitcell and architecture) with no compromise on speed and stand-by power consumption, thanks to several Vt selections to achieve the best speed versus leakage trade-off. In addition, LYRA provides flexibility for the easiest SoC integration, using only 3 metal layers to ease power routing over the RAM, with a wide range of internal configurations (mux and bank) to allow specific form factors compliant with IC Driver position with respect to the screen.

The SpRAM LYRA enriches the sponsored memory offering at TSMC 55nm HV as SpRAM RHEA, high-density and low-power single port RAM using 4 metal layers, Via ROM TITAN, increasing density up to 10%, and 2PRFile ERA, high-density and low-power two port register files.

MCU cores ranging from 8-bit 8051 and 16-bit 80251 up to 32-bit 8035 are also avaialble, for the best trade-off between power consumption and processing power or silicon area.