Power & rail static analysis captures peak power & voltage drop violations accurately

Utilising PrimeRail In-Design technology during physical implementation, combined with signoff-level accuracy, was essential to developing a robust power grid and shortened design closure schedules by multiple weeks. PrimeRail signoff will be also used for all of Toshiba's product lines, including mixed signal, ASIC and memories.

Traditionally rail analysis has been performed late in the design flow, but fixing voltage drop violations late in the design cycle has a negative impact on timing and routing closure. PrimeRail In-Design seamless integration with Synopsys' IC Compiler allows fast and accurate early rail analysis throughout the implementation flow. Vector Free Rail Analysis technology enables dynamic analysis during implementation, even in the absence of simulation vectors. By exposing average and peak power rail violations early, PrimeRail, built on Synopsys' PrimeTime timing and power engines, enables users to design an optimal power grid, minimise late stage Engineering Change Orders (ECOs) and complete signoff with confidence.

"A streamlined, integrated flow is essential to managing today's IC design complexity," said Jay Liang, CTO and Vice President of Engineering, Nationz. "The ease of use of PrimeRail within Synopsys' IC Compiler place and route system allowed us to rapidly deploy rail analysis for implementation and sign off on multiple production designs. Early analysis during implementation allowed our engineers to identify and fix power grid connectivity weaknesses in our IP-centric designs during floorplanning. This enabled creation of a robust power network early and shortened physical implementation from 12 to 10 weeks."

"Smaller technology nodes and increased design complexity have made power and rail analysis a requirement during design implementation," said Bijan Kiani, Vice President of Product Marketing, Design Group, Synopsys. "Nationz's confidence in PrimeRail's In-Design analysis capability during implementation and highly accurate analysis engines enabled them to achieve accelerated design closure for multiple designs."

"Rail analysis has become a critical requirement for advanced technology nodes," said Mr. Kazunari Horikawa, Senior Manager, Design Technology Development Department, Mixed Signal IC Division, Toshiba. "Synopsys PrimeRail provides 1.5 times faster performance over the existing solution and accuracy that meets our stringent signoff requirements. It also offers an extensive set of features to support Toshiba's broad variety of design styles and technologies. In-Design early analysis during design implementation made it easy for designers to build a robust power grid early. This early analysis combined with silicon proven accuracy and faster performance allows us to save multiple weeks in our schedules and sign off with confidence."

"Toshiba put PrimeRail through a rigorous qualification process on multiple production designs at Toshiba and it consistently exceeded Toshiba's signoff criteria," added Kiani. "With the release and standardization of PrimeRail in the physical implementation kit for early analysis and signoff, Toshiba design teams see a significant productivity boost for their advanced and established node designs."