Enhanced security package for DesignWare ARC EM processors

The new package also includes features such as instruction and data encryption as well as data integrity checks to defend against software attacks. The ARC EM Processor with Enhanced Security Package enables SoC developers to create devices less susceptible to security threats using a single, ultra-low power processor, which eliminates the increased area and power consumption that an additional security core and associated memories would entail. This combination of security features and energy savings is especially important for IoT and mobile applications, including wearables and smart home devices.

"As more sensitive data is proliferated throughout connected systems and devices, there is increasing concern about privacy and the security of embedded systems," said Pim Tuyls, CEO, Intrinsic-ID. "With its Enhanced Safety Package, Synopsys is filling an important void in the industry by providing enhanced security features on a compact, ultra-low power core. Through our collaboration with Synopsys, IC developers using ARC EM Processors can easily create secure communication channels between devices with Intrinsic-ID's core PUF security technology."

DesignWare ARC EM Processors are based on the scalable, 32-bit ARCv2 instruction set architecture (ISA) and are optimised for area and power efficiency, making them ideally suited for a wide range of connected devices. The Enhanced Security Package integrates SecureShield technology, which includes protected access control for the core functions and system bus and a secure memory protection unit with up to 16 configurable memory regions.

The secure memory protection unit supports programmable permissions to enable or disable read, write, and execution of instructions and data to and from specific regions of memory; it also offers per-region scrambling or encryption. Combined with secure context switching, the configurable memory protection unit enables multiple isolated execution contexts using a single core. In addition, programmers can use ARC Processor EXtension (APEX) technology to define custom instructions or coprocessor functions that can be restricted to execute only in secure mode, set at the time of the design or run-time programmable.

In addition, the ARC EM core's Enhanced Security Package includes an encrypted tamper-resistant pipeline and additional protection features to help prevent IP theft and system attacks. A combination of protected processor pipeline registers and in-line instruction and data encryption ensure decrypted instructions are never stored or accessible, protecting algorithms from reverse engineering without impact to the timing of instructions.

The existing ARC EM error checking and correction (ECC) functionality has also been enhanced with data and instruction path integrity checking that triggers an exception when intentionally injected errors are detected. The Enhanced Security Package integrates a watchdog timer to detect and recover from tamper-related system failures.

The ARC EM Family is supported by a robust ecosystem of software and hardware development tools, including the ARC EM Starter Kit for early software development, MetaWare Development Toolkit that generates highly efficient code ideal for deeply embedded applications, ARC simulators including nSIM and xCAM and the ARChitect core configuration tool. Synopsys' embARC Open Software Platform gives all ARC EM software developers online access to a comprehensive suite of free and open-source software that eases the development of code for IoT and other embedded applications.

"With the vast amount of personal data stored in the cloud and transferred between smart devices, effective security measures are needed to avoid the threat of data breaches and malicious attacks," said John Koeter, Vice President of marketing for IP and prototyping, Synopsys. "By extending our portfolio of security solutions with Synopsys' new Enhanced Security Package for ARC EM cores, we are enabling designers to implement the necessary functionality into their secure connected devices without sacrificing performance, power and area required by the target application."

The Enhanced Security Package with SecureShield is a part of Synopsys' comprehensive portfolio of security IP solutions, which also includes the CryptoPack option for ARC EM processors as well as the DesignWare Security IP solutions, which comprise a range of cryptography cores and software, protocol accelerators, root of trust, platform security and content protection IP.