'Active Text' does not lose focus on schematics

SLED is a schematic editor allowing designers to perform graphic entry and configuration of their designs in a shorter time. The flexibility of SLED enables the design of true mixed-signal circuits as well as multi-level and multi-physics systems.

In order to facilitate development, SLED 2.3 notably improves the capability of the schematic editor interaction with the simulator through the Active Text feature. The multi-purpose nature of the Active Text answers almost any functionality accessible through the netlist. The four main assets of Active Text include: Flexibility, Multi-language, Productivity and Adaptability.These Active Texts are text entry areas that are placed in schematics and which content can be freely edited by the user. The texts are integrated into the files generated by the netlister.

There are two types of Active Texts symbols: Control Active Texts and Netlist Active Texts. With Control Active Texts, designers can add directives and simulation options for test benches configuration. The related texts are placed in the simulator control file. It is then possible to define language instructions inserted into the generated netlist with Netlist Active Texts added in the schematic sheet. Netlist Active Texts support multiple languages and can be used in an HDL module or a Spice subcircuit. They enable high flexibility and innovative design methodologies. For instance, in a Verilog module, the designer can add specific lines in different sections for adding Verilog processes or dynamically updating a module.

An ADC test bench helps understanding the flexible and multi-language approach enabled by Active Texts. Analogue designers sometimes need to perform signal processing measurements for validating their designs. For instance, an ADC integration verification requires FFT, post-processing on the digital output for computing the SNR and THD. With Active Texts, the designer can create a checker symbol and a schematic in which an Active Text Control with a dedicated .MEASURE directive is placed.

With correct parameterisation of the Active Text, the designer develops a ‘Reusable Hierarchical Checker’ dedicated to detect ADC issues. SLED netlists a sub circuit called Checker with .MEASURE directives. Thus, with the schematic editor, the analogue team can build custom libraries used for in-depth analysis. In brief, the Active Text feature provides high flexibility for interaction with the simulator and enables developing innovative design methodologies.

Moreover, to fully benefit from Active Texts, SLED provides two additional features: Back Annotation and Automatic Calculation. With Back Annotation, used to display the results of SMASH operating points in SLED, designers can observe the results of Active Text changes directly on the schematics.With Automatic Calculation, used for running simulations and displaying results in SLED automatically, designers can observe schematic changes written in the Active Texts directly in the waveform viewer and in the report page generated by Automatic Calculation.

SLED 2.3 notably improves the capability to add simulation directives directly in the schematics. It contributes to reinforcing the link between SLED and SMASH. Designers can integrate simulator control directives into top-level schematics, paving the way to the setup of the test bench and the configuration of all simulations directly from the SLED schematic editor. The bundling of the schematic editor and a mixed-signal simulator such as SLASH provides the ideal front-end solution for designing logic and mixed-signal Silicon IP and multi-physics systems.