Design

Mentor Graphics and Intel Corporation have announced that Mentor’s circuit simulation and sign-off tools are fully enabled for Intel’s 14nm Tri-Gate process technology for customers of Intel Custom Foundry. Mentor and Intel Custom Foundry are providing models and rule decks for circuit simulation, design rule checking (DRC) and layout vs. schematic checking (LVS) for mobile and cloud infrastructure applications.

ANSYS and TowerJazz has announced a collaboration to deliver comprehensive power noise and reliability sign-off flow for mutual customers. With increased use of analogue and radio frequency (RF) integrated circuits (ICs) in a variety of electronic systems including consumer, automotive, medical and industrial applications, the ability to accurately predict the performance of these ICs prior to production has become a critical design challenge.

A new JTAG/boundary-scan hardware interface is now available for the Peak Production family of PXI test systems. The JT 2147/VPC from JTAG Technologies is a signal-conditional module that allows "ideal world" connections from JTAG Technologies PXI and PXIe DataBlaster high-speed boundary-scan controllers to the VPC (Virginia Panel Corporation) mass interconnect system supplied and used in Peak's configurable PXI-based functional testers.

Semtech Corporation has announced that the company has successfully completed electrical compliance testing of its Snowbush 28nm Platform Physical Layer IP, in support of the Hybrid Memory Cube (HMC) specification for ultra fast, next-generation memory. 

XMOS announces its Multi-Function Audio (MFA) platform, enabling designers to address the growing demand from consumers and the music industry for higher audio quality from their professional and audiophile products. A fully featured reference design that provides the core USB audio capabilities required in next-generation audio products, the MFA platform leverages XMOS technology already in use by customers such as Meridian, OPPO, Sennheiser and...

Cadence Design Systems Inc announced that its high-performance FastSPICE simulator, Spectre XPS (eXtensive Partitioning Simulator) now supports transistor-level mixed-signal design. Delivering up to 10X faster throughput versus previous advanced-SPICE solutions, Spectre XPS enables faster and more comprehensive simulation for large, complex designs including mixed-signal designs.

Cadence Design Systems Inc announced the signing of the first EDA (Electronic Design Automation) Technology Access Agreement with ARM Holdings plc that includes access to the ARM Cortex-A50 processor series, based on the ARMv8-A 64-bit architecture. This agreement also provides access to ARMv7 32-bit processor technology, ARM Mali GPUs (graphic processor units), System IP and ARM Artisan libraries. This collaboration further enables ARM and Caden...

Cadence Design Systems, Inc announced immediate availability of DDR4 PHY IP (intellectual property) built on TSMC’s 16nm FinFET process. The combination of 16nm technology and Cadence’s innovative architecture helps customers realize the maximum performance of the DDR4 standard, which is specified to scale up to 3200Mbps, as compared to today’s maximum of 2133Mbps for both DDR3 and DDR4 technologies. This technology enables serv...

Maplesoft today announced an important update to the MapleSim Control Design Toolbox, an add-on to MapleSim, the advanced system-level modeling and simulation tool from Maplesoft. The MapleSim Control Design Toolbox allows engineers to take advantage of the greater flexibility and analysis options available through the use of symbolic parameters. This new release extends the functionality of this toolbox with more control algorithms, options for ...

Invionics took the wraps off the VRDM Development Platform that layers a rapid development interface on top of Verific’s industry-standard, IEEE-compliant SystemVerilog and VHDL parsers.